4 ms·
Is it clear to anyone if the BFloat16 support in these chips means they have extra-low precision multipliers internally, or are the dot products still implement
by gok 7y ago
Is it clear to anyone if the BFloat16 support in these chips means they have extra-low precision multipliers internally, or are the dot products still implemented with the single precision guts? Does it actually increase compute over FP32 or is it just a bandwidth win?
- jcranmer 7y agoThe new instructions are, I believe: * VCVTNE2PS2BF16 — Convert Two Packed Single Data to One Packed BF16 Data [i.e., float32 -> bfloat16 conversion] * VCVTNEPS2BF16 — Convert Packed Single Data to Packed BF16 Data [ditto] * VDPBF16PS — Dot Product of BF16 Pairs Accumulated into Packed Single Precision [i.e., multiply two v2bf16 with each other, and then sum the two results into a f32.] The last instruction is the only computation instruction, and that can be implemented by breaking the 23-bit multiplier of an FMA unit into two 7-bit multipliers, one for each bfloat16, as well as duplicating the normalization logic beforehand.