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This doesn't mean ADL will actually see a wide release. I am still dead convinced we will never see a wide release of a 10nm desktop chip. It will be delayed t
by chx 7y ago
This doesn't mean ADL will actually see a wide release.
I am still dead convinced we will never see a wide release of a 10nm desktop chip. It will be delayed then cancelled in favor of 7nm.
Server wise, same, limited releases, more smoke and mirrors etc etc
Intel will limp along with 14nm until 7nm. 10nm is utter broken and they can't fix it.
- reitzensteinm 7y agoI think that's true if 7nm progress is independent of 10nm, and the mistakes made with 10nm aren't also delaying 7nm. My understanding is that Intel's 14->10nm shrink was the most aggressive in the industry, promising to yield a greater increase in density than the geometry would imply, when usually there's a loss factor and the density increase isn't as good as you'd naively expect. Even after 10nm was delayed by quite some time, Intel pointed to this and declared they weren't lagging the industry as the shrink was closer to a 1.5 node shrink. If the 10nm delay was the result of this aggressiveness and Intel was well in to developing 7nm in a similar fashion before it became obvious how 10nm was going to turn out, this may not be a matter of skipping over a single bad apple.
- chx 7y ago> I think that's true if 7nm progress is independent of 10nm, and the mistakes made with 10nm aren't also delaying 7nm That is exactly what's happening
- keanebean86 7y ago7nm was planned for 2017 as of 2014. Ouch. https://www.tweaktown.com/news/41582/intel-to-hit-10nm-in-2016-with-7nm-cpus-arriving-in-2018/index.html https://www.tweaktown.com/news/41582/intel-to-hit-10nm-in-20...
- chx 7y agoThat's just early optimism, as far as these things can be known from the outside, the process is fine very much unlike 10nm which was known to be broken for years even before Cannon Lake.
- justAnotherNET 7y ago7nm intel is EUV, 10nm intel is quad patterned DUV. Massive difference.
- scottlocklin 7y agoIs there a EILI5 on why Intel borked 10nm and why others apparently didn't?
- chx 7y agoELI5? Not really. 1. The metal pitch targeted (36nm) requires Self-Aligned Quad Patterning (SAQP) apparently is very very hard to do without EUV. TSMC is doing 40nm metal pitch and Samsung does 36nm BUT both of them are using EUV. 2. Cobalt https://fuse.wikichip.org/news/525/iedm-2017-isscc-2018-intels-10nm-switching-to-cobalt-interconnects/ https://fuse.wikichip.org/news/525/iedm-2017-isscc-2018-inte... 3. COAG https://www.reddit.com/r/AMD_Stock/comments/dk2pw7/why_it_is_so_difficult_for_intel_to_catch_up_the/f4ml1k4 https://www.reddit.com/r/AMD_Stock/comments/dk2pw7/why_it_is...
- Symmetry 7y agoI think the ELI5 is "Intel tried to do some things that were cleverer than they could actually do and messed up."
- scottlocklin 7y agoI remember them developing an EUV lithography rig at the ALS 11 bend magnet in the 90s... guess it never worked out. Looking at the website: dude's still there! Thanks for the explanation; close enough to ELI5