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What do you think those "processor microcode updates" are, then? They don't have anything to do with micro-ops, or really have any influence over the core micro

What do you think those "processor microcode updates" are, then? They don't have anything to do with micro-ops, or really have any influence over the core micro-architecture. It would be way too slow to make that programmable. People have this common misconception that the programmable micro-code is what your CPU is actually executing, and x86 somehow translates into instructions for it, and this was really just because of a conflation of the terms "micro-code" and "micro-op". Admittedly, Intel isn't the best at this term either. They have several places in the Architecture Manuals where they refer to the "micro-code synthesizer" when they mean "micro-op synthesizer"; this really has nothing to do with the micro-code ROM.

throwaway_pdp09 7y ago
They're for updating the microcode. That is tangential to their use AIUI, but useful. Also AIUI the microcode controls the issuing of the micro-ops. > It would be way too slow to make that programmable Then what is the "processor microcode updates" updating? I think this may just be a terminology mixup. Dunno if this helps, FYI from https://stackoverflow.com/questions/17395557/observing-stale-instruction-fetching-on-x86-with-self-modifying-code/18388700#18388700 https://stackoverflow.com/questions/17395557/observing-stale... ...and I can't copy/paste it. In the above link, look for 'embarrassing' by Krazy Glew.