> The CPU must conform to the strictures of the ISA, which is a much more stringent specification than the abstract machines of most language specifications. In

> The CPU must conform to the strictures of the ISA, which is a much more stringent specification than the abstract machines of most language specifications. In particular, the state of registers and flags at any given time need to be preserved, even in the presence of external interrupts. https://en.wikipedia.org/wiki/Tomasulo_algorithm https://en.wikipedia.org/wiki/Tomasulo_algorithm. So no, the consistent serialized ISA-conforming state might be reconstructed by replaying after the exception (interrupt) arrives. Alternatively, interrupt might be served only after execution reaches the next checkpoint.