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Intel made missteps with their 10nm process, and manufacturing chips in house. Yields for their new process are too low for retail demand. Additionally clock sp

Intel made missteps with their 10nm process, and manufacturing chips in house. Yields for their new process are too low for retail demand. Additionally clock speeds are higher with the more mature 14nm process of Kaby Lake, which is itself a more refined version of Skylake. With low yields, manufacturing is too expensive, and performance isn't much improved, leaving Intel little reason to bring these new chips to market. As a result, they've been refining and refreshing chips since Skylake. Kaby Lake introduced a bump in core count, as a response to AMD's release of their Zen microarchitecture. AMD overcame these challenges in several ways. They're fabless, choosing to partner with semiconductor manufacturers like TSMC rather than manufacturing chips themselves. TSMC's current 7nm process node is one generation ahead of Intel's 14nm node, roughly on par with Intel's 10nm node. Smaller process means more efficient, and often more performant. AMD also created a new architecture using a "chiplet" design and an interconnect (Zen), rather than the older monolithic die used by Intel. This increases yields and simplifies manufacturing, while making chips modular. Chiplets containing a number of cores can be combined into a single package to create various SKUs, targeting different market segments.

johnvanommen 7y ago
Great summary.
myself248 7y ago
Oh that's interesting, I had always seen the chiplet thing as purely for yield reasons, I never thought about the "one wafer, tons of SKUs" aspect. It also, I believe, lets them use a different process node for the I/O parts of the assembly, which may be deliberate -- not only do I/O transceivers not benefit from the smaller silicon, it may actually hurt them when you look at the electrical needs of driving larger buses, surviving potential ESD events, etc. (That's purely speculation on my part, and I'd love to hear from someone with more clue..)
- akiselev 7y ago
  "one wafer, tons of SKUs" has been how the semiconductor industry has managed to keep their products evolving and so cheap for decades. Intel chips are largely all the same per generation and product line (low core count i3/5/7, high core count i7/i9, and Xeon). Whether it's an i3 or an i7 depends on how many manufacturing errors were on the surface of their monolithic chip - any core that doesn't pass the tests is disabled by activating some fuses. The chips with the fewest errors contain the most working cores and so on. The same holds for flash/SSD memory and RAM, where frequency/stability are used as the measure instead of errors on the surface of the chip. The key is that AMD's chiplets are about 80 mm^2 in size whereas a recent i7 is something like 130 mm^2. It doesn't sound that much smaller but when it comes to economies of scale, it makes a huge difference when, for example, a giant scratch takes out half a dozen chiplets instead of two or three full Intel processors. AMD trades performance - since the IO die that holds the chiplets is much bigger than an Intel CPU (300+ mm^2) the communication between chiplets is higher latency - for much better unit economics. On the opposite end of the spectrum you have chips like IBM z mainframe CPUs which are as big as 600 mm^2 many of which are just thrown out instead of getting binned so their yield is tiny and each chip costs tens of hundreds of thousands of dollars.

johnvanommen 7y ago

Great summary.

myself248 7y ago

Oh that's interesting, I had always seen the chiplet thing as purely for yield reasons, I never thought about the "one wafer, tons of SKUs" aspect. It also, I believe, lets them use a different process node for the I/O parts of the assembly, which may be deliberate -- not only do I/O transceivers not benefit from the smaller silicon, it may actually hurt them when you look at the electrical needs of driving larger buses, surviving potential ESD events, etc. (That's purely speculation on my part, and I'd love to hear from someone with more clue..)

akiselev 7y ago
"one wafer, tons of SKUs" has been how the semiconductor industry has managed to keep their products evolving and so cheap for decades. Intel chips are largely all the same per generation and product line (low core count i3/5/7, high core count i7/i9, and Xeon). Whether it's an i3 or an i7 depends on how many manufacturing errors were on the surface of their monolithic chip - any core that doesn't pass the tests is disabled by activating some fuses. The chips with the fewest errors contain the most working cores and so on. The same holds for flash/SSD memory and RAM, where frequency/stability are used as the measure instead of errors on the surface of the chip. The key is that AMD's chiplets are about 80 mm^2 in size whereas a recent i7 is something like 130 mm^2. It doesn't sound that much smaller but when it comes to economies of scale, it makes a huge difference when, for example, a giant scratch takes out half a dozen chiplets instead of two or three full Intel processors. AMD trades performance - since the IO die that holds the chiplets is much bigger than an Intel CPU (300+ mm^2) the communication between chiplets is higher latency - for much better unit economics. On the opposite end of the spectrum you have chips like IBM z mainframe CPUs which are as big as 600 mm^2 many of which are just thrown out instead of getting binned so their yield is tiny and each chip costs tens of hundreds of thousands of dollars.