5 ms·
"The source code for the FPGA imager is highly different from the GPU code.This is mostly due to the different programming models: with FPGAs, one buildsa dataf
by llukas 7y ago
"The source code for the FPGA imager is highly different from the GPU code.This is mostly due to the different programming models: with FPGAs, one buildsa dataflow pipeline, while GPU code is imperative."
Please explain how they used OpenCL kernels designed for GPU.
- enos_feedler 7y agoYou can think of OpenCL kernels (or any imperative sequence of low-level operations) as data flowing through math operations. Normally, we leverage a single set of math circuits to perform all of these operations in sequence, and orchestrate the data flow through a register file. You could imagine removing the register file and instantiating an actual circuit that represents the data flow of the program itself. This creates more opportunity for pipelining, which should be plentiful in a highly data parallel computation. The issue with FPGA is they are clocked lower and are not very dense, so the tradeoff is generally not worth it.
- llukas 7y agoAre you saying that even with OpenCL kernels tailored for FPGA we get subpar results? (can belive that compilers do subpar job even on GPU)
- enos_feedler 7y agoYes, I don't think it's an issue with the compiler. The FPGA approach requires a flexible fabric that just has lot's of overhead to give it programmability compared to an ASIC. For an FPGA to have value, you _really_ need to leverage it's programmability. Emulating an ASIC design for verification and testing is a good use case.