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> The Triton chip will have eight memory controllers supporting memory running at 3.2 GHz, which is the same number of controllers in the Vulcan chip, which max
by wyldfire 7y ago
> The Triton chip will have eight memory controllers supporting memory running at 3.2 GHz, which is the same number of controllers in the Vulcan chip, which maxxed out at 2.67 GHz memory speeds. That’s a 20 percent increase in memory bandwidth, and the question is how that will balance out against the high core counts in some of the Triton SKUs.
96 cores, seems like it would be tricky to keep them busy with modest memory throughput increases.
- kingosticks 7y agoDo they really mean memory running at 3.2GHz? What memory would be running that fast? Isn't this HBM2E and it's 3.2Gbps bandwidth?
- mastax 7y agoDDR4 easily runs at 3200 MHz (DDR) though I don't know if that's common yet for ECC RDIMMS.
- kingosticks 7y agoDoh! yes, thanks, that makes a LOT more sense!
- deleted 7y ago[deleted]
- thedance 7y agoThat's a comparable configuration to an AMD EPYC "Rome" with 48c/96t and 8 memory controllers.
- mastax 7y agoFor certain workloads, having 4SMT will keep the cores busy while they're waiting on main memory.