(Note: this explanation only makes sense if you're looking at the diagram in the Z-80 article [1]). > How does A being high connect the yellow to ground exactl

(Note: this explanation only makes sense if you're looking at the diagram in the Z-80 article [1]). > How does A being high connect the yellow to ground exactly if it doesn't cross the yellow strip? The transistor gates are the green lines. Line A (polysilicon) is colored both pink and green; it's green where it is a gate and pink where it's just a wire. A signal can only cross the green line (gate) if the transistor is on. So if A is on, the yellow dot is connected to ground (via transistor 1). If B is on, the yellow dot is connected to ground (transistor 2), and so on. The yellow dot is a connection between the silicon and the metal strip (yellow) on top. The yellow metal strip ties together the three yellow dots, so it will be grounded if A or B or C is high. But that's only part of the gate. The output (where the resistor is) will be connected to the yellow metal strip if transistor 4 (D) or transistor 5 (E) is on. So the final logic function ends up being rather complex. The point is that MOS gates let you build complex AND/OR functions just as easily as a simple gate. > Is the yellow metal line much much shorter than all the other vertical lines then? Yes. The yellow metal strip is just internal wiring for the gate. The other vertical metal strips are long-distance routing from one part of the chip to another. For instance, the blue (ground) metal line goes all through the chip. > Why does input line "A" not cross the yellow metal line but the other 3 do? That's really just coincidence. A, B, and C are polysilicon wires, and they are separated from the metal layer by an insulating oxide layer. Think of the metal layer as an overpass above A, B, and C. On the other hand, if polysilicon crosses doped silicon (cyan), you end up with a transistor, so those crossings are very important. I indicate those crossings by changing the line color to green. It's hard to keep track of what's happening in the different layers. I probably should have made the explanation a bit more detailed. [1]: http://www.righto.com/2013/09/understanding-z-80-processor-one-gate.html http://www.righto.com/2013/09/understanding-z-80-processor-o...