It's a cache-based timing sidechannel attack that leaks the address of memory accesses. In general, you should probably assume that every CPU with caches is sus

It's a cache-based timing sidechannel attack that leaks the address of memory accesses. In general, you should probably assume that every CPU with caches is susceptible to those (so every one with reasonable performance). As the paper mentions, there have been other cache side channel attacks that broke cryptographic implementations and only had working exploits on Intel - people didn't count those as Intel-specific attacks along with the Meltdowns or L1TFs either then or now, though, because there was no fundamental reason why it shouldn't be possible to exploit other chips the same way. Treating this one differently and somehow comparable to Intel CPUs just outright leaking data across privilege boundaries seems like a false attempt at injecting balance where none exists.