4 ms·

I wonder if RISC-V will be able to keep its simplicity for a long time. ARM began as a small instruction set as well, and now we have instructions like the FJCV

I wonder if RISC-V will be able to keep its simplicity for a long time. ARM began as a small instruction set as well, and now we have instructions like the FJCVTZS (Floating-point Javascript Convert to Signed fixed-point, rounding toward Zero).

moring 7y ago
RISCV's main answer to this is to separate the instruction set into modular subsets so the baggage only has to be carried by those who need it. The core set doesn't even have multiplication.
- tveita 7y ago
  On the other hand the instruction set extensions can be bulky. For instance the bit manipulation set at https://github.com/riscv/riscv-bitmanip https://github.com/riscv/riscv-bitmanip adds frequently used operations like conditional move and population count, but also adds things like "multiply binary matrix" and "generalized or-combine", which I'm not sure even exists in X86 or AMD64.
VLM 7y ago
RISC has always been a marketplace relative thing. Standard HN automobile analogy is the subcompact car class has always been the lightest car class on the road, although a 2020 subcompact car weighs about a thousand pounds more than a subcompact did when I was in high school. Think of a 1990 Geo Metro at 1500 pounds vs a 2500 pound contemporary Toyota Yaris. Its always been weird to me that an old girlfriend's Metro weighed 1000 pounds less than the Yaris I own today. The average American mass has gone from perhaps 150 pounds up to 300+ pounds over the same time frame, so weirdly enough cars are getting fat slower than humans on a percentage basis, LOL. Cars (AND RISC CPUs) don't run on corn syrup, I suppose.
- beatgammit 7y ago
  To be fair, the average American male is 195 pounds, so you're exaggerating a little bit. But it is weird how heavy cars have gotten. I guess it's a combination of adding security features and demand for larger cars. I'm in the market for a car, and everything is just a bit larger than I remember for a given class. I dislike big cars, so finding a good fit is annoying.
  - jjuel 7y ago
    Security and luxury features. I mean the amount of tech that Yaris has compared to that old Metro is a Grand Canyon sized gorge. Add in safety features like air bags, and crash protection. The weight can increase quickly. So while the car may have weighed less you were also far less likely to enjoy driving that car, and far less likely to survive a serious crash.
floatboth 7y ago
ARMv8 AArch64 is actually a massive simplification, they got rid of all the crap that accumulated in 32-bit arch, it's very clean and nice. The presence of some very specific (but immensely popular) float rounding instructions does not make an ISA complex.
magicalhippo 7y ago
I'm no expert, but isn't the "reduced" in RISC about what the instructions do (and don't do) rather than the number of instructions in an ISA? FJCVTZS[1] seems pretty specialized, but it also seems rather simple. It converts the value in one register and puts the result in another register. Compare that with say MOVSB[2] from X86, which reads from memory, writes to memory and updates two registers. [1]: https://developer.arm.com/docs/100069/0607/a64-floating-point-instructions/fjcvtzs https://developer.arm.com/docs/100069/0607/a64-floating-poin... [2]: https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:movsq https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:mov...
- sifar 7y ago
  In theory, RISC meant smaller number of simpler generic instructions (reg<->reg, mem<->reg) which could be re-used to build complex functionality. However in practice one always needs specific operations for performance reasons. Having more and more specialized operations not only adds extra HW for rarely used ops, it also increases the program code size and also compiler complexity.

moring 7y ago

RISCV's main answer to this is to separate the instruction set into modular subsets so the baggage only has to be carried by those who need it. The core set doesn't even have multiplication.

tveita 7y ago
On the other hand the instruction set extensions can be bulky. For instance the bit manipulation set at https://github.com/riscv/riscv-bitmanip https://github.com/riscv/riscv-bitmanip adds frequently used operations like conditional move and population count, but also adds things like "multiply binary matrix" and "generalized or-combine", which I'm not sure even exists in X86 or AMD64.

VLM 7y ago

RISC has always been a marketplace relative thing. Standard HN automobile analogy is the subcompact car class has always been the lightest car class on the road, although a 2020 subcompact car weighs about a thousand pounds more than a subcompact did when I was in high school. Think of a 1990 Geo Metro at 1500 pounds vs a 2500 pound contemporary Toyota Yaris. Its always been weird to me that an old girlfriend's Metro weighed 1000 pounds less than the Yaris I own today. The average American mass has gone from perhaps 150 pounds up to 300+ pounds over the same time frame, so weirdly enough cars are getting fat slower than humans on a percentage basis, LOL. Cars (AND RISC CPUs) don't run on corn syrup, I suppose.

beatgammit 7y ago
To be fair, the average American male is 195 pounds, so you're exaggerating a little bit. But it is weird how heavy cars have gotten. I guess it's a combination of adding security features and demand for larger cars. I'm in the market for a car, and everything is just a bit larger than I remember for a given class. I dislike big cars, so finding a good fit is annoying.
- jjuel 7y ago
  Security and luxury features. I mean the amount of tech that Yaris has compared to that old Metro is a Grand Canyon sized gorge. Add in safety features like air bags, and crash protection. The weight can increase quickly. So while the car may have weighed less you were also far less likely to enjoy driving that car, and far less likely to survive a serious crash.

floatboth 7y ago

ARMv8 AArch64 is actually a massive simplification, they got rid of all the crap that accumulated in 32-bit arch, it's very clean and nice. The presence of some very specific (but immensely popular) float rounding instructions does not make an ISA complex.

magicalhippo 7y ago

I'm no expert, but isn't the "reduced" in RISC about what the instructions do (and don't do) rather than the number of instructions in an ISA? FJCVTZS[1] seems pretty specialized, but it also seems rather simple. It converts the value in one register and puts the result in another register. Compare that with say MOVSB[2] from X86, which reads from memory, writes to memory and updates two registers. [1]: https://developer.arm.com/docs/100069/0607/a64-floating-point-instructions/fjcvtzs https://developer.arm.com/docs/100069/0607/a64-floating-poin... [2]: https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:movsq https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:mov...

sifar 7y ago
In theory, RISC meant smaller number of simpler generic instructions (reg<->reg, mem<->reg) which could be re-used to build complex functionality. However in practice one always needs specific operations for performance reasons. Having more and more specialized operations not only adds extra HW for rarely used ops, it also increases the program code size and also compiler complexity.