It's easier to emulate CISC with RISC than the other way around. CISC instructions break down into RISC instructions but detecting which RISC instructions can b

It's easier to emulate CISC with RISC than the other way around. CISC instructions break down into RISC instructions but detecting which RISC instructions can be added together into a complex CISC instruction is much harder (though I'd note that RISCV attempts to fuse certain instructions as an optional optimization).