8 ms·

>10 MHz >1964 That's insane. What's even more insane is that a bit over 20 years later homecomputers reached that frequency. And in the next decade they reach

>10 MHz >1964 That's insane. What's even more insane is that a bit over 20 years later homecomputers reached that frequency. And in the next decade they reached over 100 MHz. - Pure lunacy. Posted from my 5 GHz homecomputer.

blattimwind 7y ago
ECL logic systems reached effective clock frequencies in excess of 500 MHz in the late 60s or so. It was extremely fast compared to contemporary RTL/TTL logic.
- cptnapalm 7y ago
  I had not heard of ECL before. Thank you for popping in with this.
  - bonzini 7y ago
    These days ECL lives on as CML, which is similar and mostly used for signal transmission. It's very fast so HDMI uses it. Some crypto circuits use CML logic too, because it's less susceptible to side channel attacks.
    - dfox 7y ago
      Almost all modern fast serial interfaces are descended from ECL. Often with a twist that while receiver is ECL/CML-style long-tailed pair (which is the obvious implementation of comparator), the transmit side is normal CMOS totem-pole output stage coupled with some passive network to produce right voltage levels (and right output impedance).
      - analognoise 7y ago
        Wait, what? You can do a MOS long-tail pair just fine, can't you? Similarly for a totem pole with BJTs. They're topological circuit constructions that work for either family - aren't they?
- deleted 7y ago
  [deleted]
- mark-r 7y ago
  I worked at the company Jim Thornton founded after he left CDC, Network Systems. Each network adapter box had a custom processor implemented in ECL.
- ajross 7y ago
  Exactly. It was MOS that lagged, not "transistors" or "computers", really. Transistorized microwave circuits (analog, not digital) in the GHz range were operating as early as the 1960's too. MOS is just hard. It's hard to fabricate, it's hard to design (i.e. you need computers to make computers!), it's hard to scale. It required new chemistries be invented and new circuit design techniques to manage the (really tiny!) components. So for a long time you could have a big circuit in discrete bipolar components which ran fast or a tiny one in MOS which was slow. But MOS was tiny and MOS was cheap. So by the early 90's it had caught up in speed with all but the fastest discrete technologies (GaAs was "right around the corner" for like two decades as it kept getting lapped by routine process shrinks -- now no one remembers it) and the market abandoned everything else.
  - kken 7y ago
    >MOS is just hard I think the important point is that "MOS scales". All the bipolar technologies never had anything like Dennard scaling, which was the backbone of Moores Law.
    - blattimwind 7y ago
      Case in point, you could get bipolar ECL RAM in the 80s with access times of around 1-2 ns (which is at least four times faster than the fastest DDR-SDRAM in 2020). Except those things would have a few kilobits at most and burn a Watt or two; an entire 16 GB stick of DDR4 doesn't require much more than that. (This is SRAM of course; you can't build good DRAM on a bipolar process, and MOS SRAM is much faster than DRAM as well. However, MOS SRAM in the 80s would have access times of 20-150 ns; it's typically the suffix of the part number, e.g. 62256-70)
tpmx 7y ago
Seymour Cray had a number of fantastic early designs: CDC-6600, 1964: 60-bit processor @ 10 MHz, 2 MIPS, 1 MFLOPS CDC-7600, 1967: 60-bit processor @ 36 MHz, 15 MIPS, 36 MFLOPS Cray-1, 1975: 64-bit processor @ 80 MHz, 80 MIPS, 160 MFLOPS I think this means that if a corresponding development in video coprocessors had been taking place (there wasn't really a recognized need for them back then, as far as I can tell), the CDC-6600 could have been running Wolfenstein 3D decently well in 1964, 28 years before the launch in 1992. And the CDC-7600 could have been running DOOM decently well in 1967, 26 years before the launch in 1993.
- kragen 7y ago
  The first commercial GPU might have been the LDS-1 from Utah in 1969, which was indeed used for FPS gaming: https://en.m.wikipedia.org/wiki/LDS-1_(Line_Drawing_System-1) https://en.m.wikipedia.org/wiki/LDS-1_(Line_Drawing_System-1... But it built on the history of “display processors” already in use: http://www.cap-lore.com/Hardware/Wheel.html http://www.cap-lore.com/Hardware/Wheel.html I had thought that computers of the time didn't have enough RAM for a framebuffer, but evidently the CDC6600 did, with what we would call 982 kilobytes today.
  - tpmx 7y ago
    Yeah, I guess bitmapped "GPUs" were considered an extreme luxuary/waste of money back then.
    - RantyDave 7y ago
      There still are GPU's that work by rendering the entire display list for every line. Yes, ie thousands of times a second. https://www.ftdichip.com/EVE/EVEProducts.htm https://www.ftdichip.com/EVE/EVEProducts.htm
      - tpmx 7y ago
        That's fascinating! Can you tell us more about their typical use cases? I mean.. I did see https://www.ftdichip.com/EVE/EVEApplications.htm https://www.ftdichip.com/EVE/EVEApplications.htm .. but, in reality? Are you based out of Taiwan?
dwheeler 7y ago
> That's insane. What's even more insane is that a bit over 20 years later homecomputers reached that frequency. And in the next decade they reached over 100 MHz. The CDCs still had a good run. This line was originally released in 1964. It started at 10MHz, but that was 60 bit words, and special floating-point systems. IIRC floating-point multiplies were only one clock cycle; if that's correct, it took 100 nanoseconds. The Apple II came out in 1977, 1MHz, 8 bit CPU and no floating-point circuits. You had to use many cycles to do any floating point, and typically you only used 32-bit floating point (because it was painful enough there). A single 32-bit floating point multiply took 3-4 milliseconds according to: https://books.google.com/books?id=xJnfBwAAQBAJ&pg=PA26&lpg=PA26&dq=Apple+II+floating+point+multiply+time&source=bl&ots=Gm2Tqp9k-8&sig=ACfU3U0U67qMzBVDU7HNt1yq6FtHpp-NAw&hl=en&sa=X&ved=2ahUKEwiByqrd7tPnAhXIGs0KHdz-D5EQ6AEwAnoECAgQAQ#v=onepage&q=Apple%20II%20floating%20point%20multiply%20time&f=false https://books.google.com/books?id=xJnfBwAAQBAJ&pg=PA26&lpg=P... The original IBM PC came out in 1981. Its clock was 4.77 MHz. But again, that was misleading. Internally the 8086 was a 16-bit CPU but its memory I/O was only 8 bits wide. It didn't normally come with a floating-point processor. There was one, the 8087, and I think the original IBM PC had a socket for it, but it cost big $$$ and the 8087 wasn't actually available for purchase until ~6 months after the PC's release. That one could go 4-10MHz. If you bought a coprocessor, you were finally getting to somewhat similar speeds for numerical calculations... but that was 16+ years later.
- abbeyj 7y ago
  > Internally the 8086 was a 16-bit CPU but its memory I/O was only 8 bits wide. Did you mean 8088 here?
  - dwheeler 7y ago
    Yes, 8088. Thanks for the fix. The 8088 was a 16-bit CPU with an 8-bit bus. The 8086 was a 16-bit CPU with an actual 16-bit bus.
    - Accujack 7y ago
      Interestingly, the original "sx" designation for Intel 386 chips (80386sx) meant the same sort of thing... the 386sx was a 32 bit chip with a 16 bit bus. The dx was 32/32. A product generation later, Intel changed what this meant to indicate whether or not the CPU had an on-chip FPU.

blattimwind 7y ago

ECL logic systems reached effective clock frequencies in excess of 500 MHz in the late 60s or so. It was extremely fast compared to contemporary RTL/TTL logic.

cptnapalm 7y ago
I had not heard of ECL before. Thank you for popping in with this.
- bonzini 7y ago
  These days ECL lives on as CML, which is similar and mostly used for signal transmission. It's very fast so HDMI uses it. Some crypto circuits use CML logic too, because it's less susceptible to side channel attacks.
  - dfox 7y ago
    Almost all modern fast serial interfaces are descended from ECL. Often with a twist that while receiver is ECL/CML-style long-tailed pair (which is the obvious implementation of comparator), the transmit side is normal CMOS totem-pole output stage coupled with some passive network to produce right voltage levels (and right output impedance).
    - analognoise 7y ago
      Wait, what? You can do a MOS long-tail pair just fine, can't you? Similarly for a totem pole with BJTs. They're topological circuit constructions that work for either family - aren't they?
deleted 7y ago
[deleted]
mark-r 7y ago
I worked at the company Jim Thornton founded after he left CDC, Network Systems. Each network adapter box had a custom processor implemented in ECL.
ajross 7y ago
Exactly. It was MOS that lagged, not "transistors" or "computers", really. Transistorized microwave circuits (analog, not digital) in the GHz range were operating as early as the 1960's too. MOS is just hard. It's hard to fabricate, it's hard to design (i.e. you need computers to make computers!), it's hard to scale. It required new chemistries be invented and new circuit design techniques to manage the (really tiny!) components. So for a long time you could have a big circuit in discrete bipolar components which ran fast or a tiny one in MOS which was slow. But MOS was tiny and MOS was cheap. So by the early 90's it had caught up in speed with all but the fastest discrete technologies (GaAs was "right around the corner" for like two decades as it kept getting lapped by routine process shrinks -- now no one remembers it) and the market abandoned everything else.
- kken 7y ago
  >MOS is just hard I think the important point is that "MOS scales". All the bipolar technologies never had anything like Dennard scaling, which was the backbone of Moores Law.
  - blattimwind 7y ago
    Case in point, you could get bipolar ECL RAM in the 80s with access times of around 1-2 ns (which is at least four times faster than the fastest DDR-SDRAM in 2020). Except those things would have a few kilobits at most and burn a Watt or two; an entire 16 GB stick of DDR4 doesn't require much more than that. (This is SRAM of course; you can't build good DRAM on a bipolar process, and MOS SRAM is much faster than DRAM as well. However, MOS SRAM in the 80s would have access times of 20-150 ns; it's typically the suffix of the part number, e.g. 62256-70)

tpmx 7y ago

Seymour Cray had a number of fantastic early designs: CDC-6600, 1964: 60-bit processor @ 10 MHz, 2 MIPS, 1 MFLOPS CDC-7600, 1967: 60-bit processor @ 36 MHz, 15 MIPS, 36 MFLOPS Cray-1, 1975: 64-bit processor @ 80 MHz, 80 MIPS, 160 MFLOPS I think this means that if a corresponding development in video coprocessors had been taking place (there wasn't really a recognized need for them back then, as far as I can tell), the CDC-6600 could have been running Wolfenstein 3D decently well in 1964, 28 years before the launch in 1992. And the CDC-7600 could have been running DOOM decently well in 1967, 26 years before the launch in 1993.

kragen 7y ago
The first commercial GPU might have been the LDS-1 from Utah in 1969, which was indeed used for FPS gaming: https://en.m.wikipedia.org/wiki/LDS-1_(Line_Drawing_System-1) https://en.m.wikipedia.org/wiki/LDS-1_(Line_Drawing_System-1... But it built on the history of “display processors” already in use: http://www.cap-lore.com/Hardware/Wheel.html http://www.cap-lore.com/Hardware/Wheel.html I had thought that computers of the time didn't have enough RAM for a framebuffer, but evidently the CDC6600 did, with what we would call 982 kilobytes today.
- tpmx 7y ago
  Yeah, I guess bitmapped "GPUs" were considered an extreme luxuary/waste of money back then.
  - RantyDave 7y ago
    There still are GPU's that work by rendering the entire display list for every line. Yes, ie thousands of times a second. https://www.ftdichip.com/EVE/EVEProducts.htm https://www.ftdichip.com/EVE/EVEProducts.htm
    - tpmx 7y ago
      That's fascinating! Can you tell us more about their typical use cases? I mean.. I did see https://www.ftdichip.com/EVE/EVEApplications.htm https://www.ftdichip.com/EVE/EVEApplications.htm .. but, in reality? Are you based out of Taiwan?

dwheeler 7y ago

> That's insane. What's even more insane is that a bit over 20 years later homecomputers reached that frequency. And in the next decade they reached over 100 MHz. The CDCs still had a good run. This line was originally released in 1964. It started at 10MHz, but that was 60 bit words, and special floating-point systems. IIRC floating-point multiplies were only one clock cycle; if that's correct, it took 100 nanoseconds. The Apple II came out in 1977, 1MHz, 8 bit CPU and no floating-point circuits. You had to use many cycles to do any floating point, and typically you only used 32-bit floating point (because it was painful enough there). A single 32-bit floating point multiply took 3-4 milliseconds according to: https://books.google.com/books?id=xJnfBwAAQBAJ&pg=PA26&lpg=PA26&dq=Apple+II+floating+point+multiply+time&source=bl&ots=Gm2Tqp9k-8&sig=ACfU3U0U67qMzBVDU7HNt1yq6FtHpp-NAw&hl=en&sa=X&ved=2ahUKEwiByqrd7tPnAhXIGs0KHdz-D5EQ6AEwAnoECAgQAQ#v=onepage&q=Apple%20II%20floating%20point%20multiply%20time&f=false https://books.google.com/books?id=xJnfBwAAQBAJ&pg=PA26&lpg=P... The original IBM PC came out in 1981. Its clock was 4.77 MHz. But again, that was misleading. Internally the 8086 was a 16-bit CPU but its memory I/O was only 8 bits wide. It didn't normally come with a floating-point processor. There was one, the 8087, and I think the original IBM PC had a socket for it, but it cost big $$$ and the 8087 wasn't actually available for purchase until ~6 months after the PC's release. That one could go 4-10MHz. If you bought a coprocessor, you were finally getting to somewhat similar speeds for numerical calculations... but that was 16+ years later.

abbeyj 7y ago
> Internally the 8086 was a 16-bit CPU but its memory I/O was only 8 bits wide. Did you mean 8088 here?
- dwheeler 7y ago
  Yes, 8088. Thanks for the fix. The 8088 was a 16-bit CPU with an 8-bit bus. The 8086 was a 16-bit CPU with an actual 16-bit bus.
  - Accujack 7y ago
    Interestingly, the original "sx" designation for Intel 386 chips (80386sx) meant the same sort of thing... the 386sx was a 32 bit chip with a 16 bit bus. The dx was 32/32. A product generation later, Intel changed what this meant to indicate whether or not the CPU had an on-chip FPU.