3 ms·
We took part of in the original HAB disclosure process for the NXP i.MX series and we carry on testing these parts. Please see https://github.com/f-secure-foun
by lcarsip 7y ago
We took part of in the original HAB disclosure process for the NXP i.MX series and we carry on testing these parts.
Please see https://github.com/f-secure-foundry/advisories https://github.com/f-secure-foundry/advisories
Of course all P/Ns used for the Mk II have a patched boot ROM, please see https://github.com/f-secure-foundry/usbarmory/wiki/Secure-boot-(Mk-II)#security-information https://github.com/f-secure-foundry/usbarmory/wiki/Secure-bo....
The original Mk I was 6 layers in the end, the Mk II is also 6 layers.
And yes the BOM cost is considerable due to its specifications.
The i.MX SoC core we use is comparable to a 1st gen Raspberry PI in speed, but of course slower than newer multi-core ones.
However security and form factor, rather than pure speed, is our goal. For the intent and purposes of the board performance is more than adequate.
Some benchmarks here: https://github.com/f-secure-foundry/usbarmory/wiki/Benchmarks-(Mk-II) https://github.com/f-secure-foundry/usbarmory/wiki/Benchmark...
- RL_Quine 7y agoI have deep respect for you disclosing issues in a processor you're using in your own product.