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Not surprised: 100GBe interconnects vs proprietary interconnect. Complex architecture for which a hell of a lot work has to be done in the compiler (anyone reme

Not surprised: 100GBe interconnects vs proprietary interconnect. Complex architecture for which a hell of a lot work has to be done in the compiler (anyone remember Itanium?) vs something that's barely more complex than NUMA. Lower TDP per node is relevant for large scale datacenters. Yes, Nervana looks much sexier, but I'd expect Habana to be more useful/usable overall.

m0zg 7y ago
Hell of a lot has to be done for Habana, too. And hell of a lot had to be done only for their edge SKU. My understanding is, their "N" SKU was basically TPUv3 for the masses - it's not even a question there was massive product-market fit if they integrated it into TF or PyTorch, it'd take off like a rocket.. Their "I" SKU was more along the lines of Habana: more Movidius-like, but scaled up. That thing (Movidius) has a specialized VLIW architecture (SHAVE) for which they had to write a compiler and roll it into LLVM, and if you read the architecture docs you'll see why. 12 VLIW cores, specialized memory arch, it's a bear to program for. Nobody will ever touch this shit with a 10 foot pole if they can avoid it. Systolic TPU-like stuff is more constrained with what it can do, but it's much easier to use and write drivers for (not to mention shrink the litography with). And it's also nowhere near its peak potential either, from either the throughput or energy efficiency standpoint. _And_ you can scale it down to edge as well, as Google has shown. It's just a better approach at least in the foreseeable future.
- archi42 7y ago
  > Hell of a lot has to be done for Habana, too. Yeah "barely more complex than NUMA" was a slight exaggeration and only meant in comparison to the other ;-) Judging by the architecurial differences layed out in the link, Habana is still hard-as-hell to develop a toolchain for; but Nervana is the kind of stuff that can drive people insane.

m0zg 7y ago

Hell of a lot has to be done for Habana, too. And hell of a lot had to be done only for their edge SKU. My understanding is, their "N" SKU was basically TPUv3 for the masses - it's not even a question there was massive product-market fit if they integrated it into TF or PyTorch, it'd take off like a rocket.. Their "I" SKU was more along the lines of Habana: more Movidius-like, but scaled up. That thing (Movidius) has a specialized VLIW architecture (SHAVE) for which they had to write a compiler and roll it into LLVM, and if you read the architecture docs you'll see why. 12 VLIW cores, specialized memory arch, it's a bear to program for. Nobody will ever touch this shit with a 10 foot pole if they can avoid it. Systolic TPU-like stuff is more constrained with what it can do, but it's much easier to use and write drivers for (not to mention shrink the litography with). And it's also nowhere near its peak potential either, from either the throughput or energy efficiency standpoint. _And_ you can scale it down to edge as well, as Google has shown. It's just a better approach at least in the foreseeable future.

archi42 7y ago
> Hell of a lot has to be done for Habana, too. Yeah "barely more complex than NUMA" was a slight exaggeration and only meant in comparison to the other ;-) Judging by the architecurial differences layed out in the link, Habana is still hard-as-hell to develop a toolchain for; but Nervana is the kind of stuff that can drive people insane.