3 ms·
Indeed as TR is 4-channel and Epyc is 8-channel. If one needs ECC, TR is a bit more limited still due to unbuffered ECC memory having lower max speeds presently
by amarshall 7y ago
Indeed as TR is 4-channel and Epyc is 8-channel. If one needs ECC, TR is a bit more limited still due to unbuffered ECC memory having lower max speeds presently.
- cma 7y agoCan't edit now but I meant to write "allowing [uniform] memory access/latency to all cores"