The workstation chips have tons more L2, but the change was made at the same time that they redesigned the L3 to be distributed over a mesh network, significant

The workstation chips have tons more L2, but the change was made at the same time that they redesigned the L3 to be distributed over a mesh network, significantly reducing its own performance. The boosted L2 compensated to keep the total performance of the cache hierarchy roughly constant while unlocking the future scalability of the mesh network. There will definitely be workloads that benefit from the new cache hierarchy, but there are also those that suffer. If you've measured it on a high end laptop for comparison then, of course, the proof is in the pudding and I'm not going to argue (or if you see >~10 threads in use that's proof enough).