Ok, if two processors read/write the same address what happens? Could I assume the reads are coherent but writes are not? If this is the case then I assume I'd

Ok, if two processors read/write the same address what happens? Could I assume the reads are coherent but writes are not? If this is the case then I assume I'd just need to design-wise restrict one processor from writing to another's area, yes? I've worked on worse. Quite promising set of ideas from my limited reading.