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I like Helmut Neemann's Digital: https://github.com/hneemann/Digital https://github.com/hneemann/Digital It simulates logic, supports automated testing, simula
by Gracana 7y ago
I like Helmut Neemann's Digital: https://github.com/hneemann/Digital https://github.com/hneemann/Digital
It simulates logic, supports automated testing, simulates and analyses combinatorial and sequential logic, comes with a large library of components (generic stuff, specific 7400 logic, displays and memories, etc), it can output VHDL or Verilog, and it can export JEDEC files for GALs.
- ngcc_hk 7y agoThis seems more interesting as it is open sourced, support current hardware etc.
- emmanueloga_ 7y agoLooks great, I'll give it a try! Looks like it implements a different minimization algorithm [1]. 1: https://en.wikipedia.org/wiki/Quine%E2%80%93McCluskey_algorithm https://en.wikipedia.org/wiki/Quine%E2%80%93McCluskey_algori...
- TimTheTinker 7y agoQuine McCluskey is equivalent to using Karnaugh maps. Both are basic digital logic minimization workflows, and are taught in any course covering digital logic or CS-focused discrete math.