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I don't know if it sounds bright. It sounds like there are developments to be expected in the short term (the way the article presents it sounds like it's just

by clarry 7y ago

I don't know if it sounds bright. It sounds like there are developments to be expected in the short term (the way the article presents it sounds like it's just supposed to be good PR for Intel), but it's not clear these tricks scale like process used to scale. Can you stack three, four, five, ten transistor layers on a chip? And how do you power & cool that stack?

grogers 7y ago
Cooling may be an issue for stacking tons of cpu cores, true. But further increases in cache, RAM, SSD sizes (which may not affect power/cooling as much) will also have benefits.
- clarry 7y ago
  My understanding is that caches are about as power hungry as the rest of the core, and consume lot of space on the chip, which is why you find large high-TDP desktop & server chips with huge L3s and then mobile chips with rather tiny caches. And huge caches are getting problematic in terms of latency too; if you're doing high performance stuff, you might just have to treat L3 like you used to treat RAM as far as cost of access goes. AIUI we just don't have much to gain on that front unless we can keep actually shrinking the process. RAM and SSD sizes would mainly benefit from becoming cheaper (although even that's not a given if we're stacking layers and effectively multiplying the area -- with possible defects -- by number of layers) but that unfortunately doesn't translate to performance. Both do also run into thermal limits if you try to push performance. Alternatively you can add lanes for more bandwidth, but that doesn't help with latency, and you need more silicon on the CPU to actually handle it. Right now I do not have any performance problem that I could solve by throwing more RAM or SSD at it (but I could just walk into a store and buy either and have enough for years to come; I can't walk into a store and buy a CPU that's fast enough to not be a bottleneck for years to come). Where there are bottlenecks, they are due to CPU execution speed or I/O bandwidth & latency.
LargoLasskhyfv 7y ago
When i look at how mechanically delicate current cpu sockets are, i see no real reason why some liquid cooling connectors couldn't be integrated. Which then would connect to some capillary lattice embedded in the substrate. Sure would be more costly(in the beginning), but imagine the possible benefits?

by clarry 7y ago

grogers 7y ago

Cooling may be an issue for stacking tons of cpu cores, true. But further increases in cache, RAM, SSD sizes (which may not affect power/cooling as much) will also have benefits.

clarry 7y ago
My understanding is that caches are about as power hungry as the rest of the core, and consume lot of space on the chip, which is why you find large high-TDP desktop & server chips with huge L3s and then mobile chips with rather tiny caches. And huge caches are getting problematic in terms of latency too; if you're doing high performance stuff, you might just have to treat L3 like you used to treat RAM as far as cost of access goes. AIUI we just don't have much to gain on that front unless we can keep actually shrinking the process. RAM and SSD sizes would mainly benefit from becoming cheaper (although even that's not a given if we're stacking layers and effectively multiplying the area -- with possible defects -- by number of layers) but that unfortunately doesn't translate to performance. Both do also run into thermal limits if you try to push performance. Alternatively you can add lanes for more bandwidth, but that doesn't help with latency, and you need more silicon on the CPU to actually handle it. Right now I do not have any performance problem that I could solve by throwing more RAM or SSD at it (but I could just walk into a store and buy either and have enough for years to come; I can't walk into a store and buy a CPU that's fast enough to not be a bottleneck for years to come). Where there are bottlenecks, they are due to CPU execution speed or I/O bandwidth & latency.

LargoLasskhyfv 7y ago

When i look at how mechanically delicate current cpu sockets are, i see no real reason why some liquid cooling connectors couldn't be integrated. Which then would connect to some capillary lattice embedded in the substrate. Sure would be more costly(in the beginning), but imagine the possible benefits?