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I just tried the Project Trellis open source FPGA tool chain for RISC-V. I was forced into it: a few years ago I bought the Lattice ECP5-5G Versa Dev kit (on s

I just tried the Project Trellis open source FPGA tool chain for RISC-V. I was forced into it: a few years ago I bought the Lattice ECP5-5G Versa Dev kit (on sale at the time for $99, $200 now I think). The Lattice tools for the FPGA on this board requires a license. Well the license ran out, and I don't want to pay $900 for a Diamond license. Anyway, I got this example from Project Trellis to work on this board. It uses this "PICO RISC-V" (the entire CPU is in a single Verilog file): https://github.com/SymbiFlow/prjtrellis/tree/master/examples/picorv32_versa5g https://github.com/SymbiFlow/prjtrellis/tree/master/examples... I think it would be straightforward to build a Linux capable RISC-V system for this board using this free tool chain. The board has SDRAM, FTDI UART and SPI-flash. It does not have an SD slot, but maybe could be wired in with the expansion headers. This ULX3S board also looks promissing, but is not available yet: https://www.crowdsupply.com/radiona/ulx3s https://www.crowdsupply.com/radiona/ulx3s What's very cool is that low end ECP5 FPGAs are around $5. I think RISC-V on an ECP5 with LCD touch interface might be the cheapest available option for a Linux microcontroller with a touch LCD interface. By available, I mean where you can easily buy the chips on mainstream distributors (otherwise it would for sure be some AllWinner chip).

kersny 7y ago
A RISC-V linux system for the ECP5 can be built with the FOSS toolchain using vexriscv and litex: https://github.com/litex-hub/linux-on-litex-vexriscv https://github.com/litex-hub/linux-on-litex-vexriscv also, step by step using a different core (rocket): https://insights.sei.cmu.edu/sei_blog/2019/10/how-to-build-a-trustworthy-freelibre-linux-capable-64-bit-risc-v-computer.html https://insights.sei.cmu.edu/sei_blog/2019/10/how-to-build-a...
- jhallenworld 7y ago
  I'm amazed to see the preferred toolchain for LiteX for ECP5 listed as "Yosys/Trellis/Nextpnr" (and vendor proprietary tools for the other families). The rocket core mentions 102% of space used of an 85K LUT FPGA and having to deal with it. I wonder which core is using so much space? I have more experience with vendor soft cores, and they would use much less..

kersny 7y ago

A RISC-V linux system for the ECP5 can be built with the FOSS toolchain using vexriscv and litex: https://github.com/litex-hub/linux-on-litex-vexriscv https://github.com/litex-hub/linux-on-litex-vexriscv also, step by step using a different core (rocket): https://insights.sei.cmu.edu/sei_blog/2019/10/how-to-build-a-trustworthy-freelibre-linux-capable-64-bit-risc-v-computer.html https://insights.sei.cmu.edu/sei_blog/2019/10/how-to-build-a...

jhallenworld 7y ago
I'm amazed to see the preferred toolchain for LiteX for ECP5 listed as "Yosys/Trellis/Nextpnr" (and vendor proprietary tools for the other families). The rocket core mentions 102% of space used of an 85K LUT FPGA and having to deal with it. I wonder which core is using so much space? I have more experience with vendor soft cores, and they would use much less..