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RISC is not MISC (minimal instruction set computer) The "Reduced" refers to reduced workload per instruction, not number or complexity of instructions for prog
by Nokinside 7y ago
RISC is not MISC (minimal instruction set computer)
The "Reduced" refers to reduced workload per instruction, not number or complexity of instructions for programmer. For example adding explicit load/store instructions.
Many modern RISC ISA's have more instructions than CISC processors.
- Taniwha 7y agoA great way to think of the original RISC transition is as a tradeoff between instruction decode complexity (and speed) and instruction fetch bandwidth. This trade-off equation changed enormously the moment that L1 I-caches moved on-chip - which was when the RISC revolution flowered