Nice summary. A bit more context: * typical supply voltage for advanced CMOS is now under 1V * your typical high performance part dissipates anywhere from 50W

Nice summary. A bit more context: * typical supply voltage for advanced CMOS is now under 1V * your typical high performance part dissipates anywhere from 50W to 250W from the die * this means that a chip has to be supplied 50-250 A of current * the current demand from the chip can be quite variable (idling along at a few watts, then ramping up rapidly to full load or vice versa), and power supply/regulators have to be able to provide this current with very little noise to the chip * chip itself is a complex system (package with all the hundreds of connections to the board feeding power/ground/signals to the silicon die) * high performance parts, with clock speeds of 1GHz+ have very fast internal signal edge rates internally, on the order of few to tens of picoseconds. 1ps, for reference, is 0.3mm at light speed. Power grid, power integrity, power behavior of modern designs is stunningly complex.