I hope (perhaps naively) that CPU vendors will wake up, model all side channel data flows and prevent information leakage or provide features for software to us

I hope (perhaps naively) that CPU vendors will wake up, model all side channel data flows and prevent information leakage or provide features for software to use to do so. CPU features like software controlled cache compartmentalization could also help, preventing cache related side channel leaks. > The same comes when you allow random untrusted code be JITed or even ran as is with WASM. If it's single threaded and WASM "syscall" interface doesn't provide anything that can be used as a clock, I don't see there's much to exploit — as long as each syscall interface itself is secure against direct and side channel attacks. > ...remove JIT compilation of untrusted code. You could probably still be able to exploit these issues, just somewhat slower. Also interpreters need to access memory, and those patterns are highly predictable.