The branch predictor is not involved here since there is no branch. A conditional non-branch instruction is, on most implementations, scheduled identically to

The branch predictor is not involved here since there is no branch. A conditional non-branch instruction is, on most implementations, scheduled identically to the unconditional base instruction. A load/store instruction whose condition passes thus executes identically to an unconditional one. If the condition fails, it schedules as though it had hit L1 cache. The main problem I see here is significantly increased code size, which will put additional pressure on the L1 I-cache.