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IR drop analysis methodology is a joke in my experience. As a verification engineer you are told to run a simulation with 'high switching activity' and then pic
by KSteffensen 7y ago
IR drop analysis methodology is a joke in my experience. As a verification engineer you are told to run a simulation with 'high switching activity' and then pick the 300 ns with highest activity and send the waveforms to the backend guys who will somehow use this as basis for their IR analysis. This is horribly error prone.
Why are we not developing formal tools that can give us the worst case switching activity and basing analysis on that?
- temac 7y agoHow would hackers later have fun if you made a chip that works all the time?
- deleted 7y ago[deleted]
- jgeada 7y agoWho says we're not? For context, I'm one of the people quoted in the original article. EDA companies constantly work on advanced technology with a few development partners. You can read that as: large companies willing to put substantial resources into a research project to push the state of the art. Eventually the more successful projects trickle down to the rest of the industry, some others just become custom options/scripts for particular companies advanced methodologies (this, btw, is one of the reasons EDA software tends to be quite complex)