I think it's not that the chips are getting noisier, but it's the opposite problem - the chips are more susceptible to noises, and making their design more chal

I think it's not that the chips are getting noisier, but it's the opposite problem - the chips are more susceptible to noises, and making their design more challenging. Even the article itself agrees. > the voltage levels keep getting closer to the threshold level, which means that the amount of room you have to buffer your signal from the noise ripple gets smaller and smaller. I'm not an engineer and I don't design the circuit inside a microchip, but it's useful to explain this concept from a circuit board design perspective, and talk about the circuit outside the microchip. I hope my comment can help software engineers to understand the basic background. To begin with, take a look at the logic level of different families of simple logic chips. Take a look of this picture, it illustrates the logic threshold voltages of different digital buses. http://www.interfacebus.com/voltage_LV_threshold.html http://www.interfacebus.com/voltage_LV_threshold.html It's easier to explain with examples. 1. A logic gate. Nothing can be simpler than a 7404 inverter - it inverts a Boolean value, if the input is a "logic 1", the output is "logic 0", vice versa. If you are using a 74LS04 chip, it uses the standard 5 V TTL logic level: anything between 2.0 V - 5.0 V is seen as "logic 1", anything lower than 0.8 V is seen as "logic 0". It has a rise time of 30 nanoseconds or so, and the chip cannot go faster than 30 MHz. You can easily make the chip to do its job by hooking a bunch of random wires, without any impedance control or power supply decoupling. On the other hand, we have a 74AVC04 chip, which does the same, invert the signal. But it uses a 1.8 V power supply voltage, with thresholds of 1.35 V and 0.63 V respectively. Also, this chip has a rise time of 0.5 nanoseconds, and operates above 200 MHz. Now: * All the noise it can tolerate is around 100 milivolts, before the chip starts to go crazy and switch randomly. * Although it's a digital circuit, you must treat your signals as an analog radio signal (the fifth harmonic of a 100 MHz square wave is 1 GHz) and consider all the physical effects that can distort the signal. It's no longer 0s and 1s, but waves bouncing around. For example, if you don't add input termination to match the impedance, the output signal from the last circuit will hit the receiver and bounce back to the transmitter. Even the location of the interconnecting traces, the dielectric material of the circuit board started to matter. * You must design an elaborate power supply network on your circuit board to eliminate the switching noises and supply adequate electric power, because the chip can turn on faster than what your power supply can deliver. Finally we have CPUs that operates at Vcore voltage well below 1.0 V, at a few gigahertz, it makes the problem above more serious. Take a look of a modern CPU, it has a hundred of capacitors underneath, because the circuits inside switch on and off so fast that the power supply cannot even have sufficient time to deliver the current it needs. 2. A DAC/ADC example. There are those 24-bit audio DAC everywhere nowadays, and it's easy to be fooled by them and think that 24-bit is trivial. But let's examine the cheapest ADC you can buy today, often for free because it comes with your microcontroller. Many people think it's bad and has low precision. So, you have a 0 to 5-volt input signal. When you have a 8-bit ADC, it means it can recognize 256 (2^8) different voltages, it means the smallest delta-V is can recognize is 0.019 V, 19 milivolts, or 1.9% of 5 V! Nowadays, a more expensive data acquisition system is often 10-bit. It's 0.0049 V, 4.9 milivolts! It's often used by the most expensive oscilloscopes. An even more expensive setup is 12-bit, it's 0.001 V. Just think about it, a 12-bit data acquisition system will be destroyed by any noise higher than 1 milivolt. And this noise can come from everywhere. Bad power integrity due to inadequate decoupling, crosstalks between traces, electromagnetic interference, and if your board design is bad enough, it can even come from the digital portion of the same chip itself. To put it straight and simple: Even designing a 8-bit circuit that can fully utilize the performance of the 8-bit ADC is challenging, you can't do this without a solid background in electronics. When people are talking about quantization noise of digital circuit, remember that a precision of 8-bit is not easily achievable even in analog circuit. (But that depends on what you are working on, DC is easiest, audio is easier, 100 MHz is not!) It's why we have 24-bit audio ADC, but we only have 10-bit oscilloscopes and 12-bit software-defined radio, because it doesn't even make sense after that. Does it even make sense to recognize a signal to the precision 24-bit (0.0001 milivolts)?! The only thing that is capable of doing that is a sensitive analog frontend circuit of a radio receiver can do this (yes, it may include your AM radio), and the purpose of it is to process the signal to a more usable form. Conclusion: The development of higher data rates digital systems and more sensitive analog chips, requires a lower noise floor. The chip in 1979 runs at 1 MHz and 15 volts, today it runs at less than 1 volts Vcore and 1 GHz. Yet, the technology of delivering power into these systems remains the same. The power from a DC power plug in a board today has the same amount of noise, just like it was in 1979. Thus, the task of designing a power supply network on a board or a chip is becoming more and more challenging, as the article said, > You have to perform multi-physics, multi-domain simulation with the ability to co-simulate the behavior of the power grid together with timing.