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> So yeah, should maybe computers be liberated from the single pipeline? Internally, they basically are. Instruction and data caches are separate and only conn
by cwzwarich 7y ago
> So yeah, should maybe computers be liberated from the single pipeline?
Internally, they basically are. Instruction and data caches are separate and only connect at the L2 level. Aliasing between the two pipelines is only allowed if software requests it, with the specific architecture determining the amount of automatic vs. manual synchronization required. What would you prefer, physically disjoint DRAM?
- aasasd 7y agoI think I've read about programs misapplying the execution bits accidentally, such that malicious data can slip by. Buffer overflows still don't seem to be shrugged away despite the bits. Maybe finish the move and do exactly what was proposed before the single pipeline: don't ever mix data and code in the same memory. No need for physically separating the RAM. Just have designated areas, maybe even allocate code areas on the fly―only not by the program itself. Even JIT can be accommodated this way, I think: since you know that code comes from the program and not errant buffers, and if the program is marked as JIT-type, let it write to a code area allocated just for this program. But probably not copy from the data memory.