4 ms·
> at least until we are working at even smaller scales. We are. The current cutting edge for microchip fabs is 7 nanometers and TSMC is planning a 5 nm one for
by Iv 7y ago
> at least until we are working at even smaller scales.
We are. The current cutting edge for microchip fabs is 7 nanometers and TSMC is planning a 5 nm one for 2020 and a 3 nm one for 2022.
And according to wikipedia: "at separations of 10 nm the Casimir effect produces the equivalent of about 1 atmosphere of pressure" they say it is the dominant force on submicron scales between conductors.
I don't know where MEMS are nowadays, but understanding this force is probably something that will help them miniaturize even more.
- Retric 7y agoThose nm scales are just marketing at this point, they don’t describe feature sizes.
- Iv 7y agoOh, I did not know that. Sigh why do journalists accept to go along with these lies? (No, don't answer, that's rhetorical). So apparently feature sizes are around 40 nm even in "7" or "10 nm" processes.
- mannykannot 7y agoEven so, ~1 atmosphere for a gap that is order-of-magnitude comparable to current technology is interesting, and higher than I would have guessed. On reflection, there's a correspondence between the frequency of the light needed in fabricating features of this size by photolithography, and the cut-off frequency for the Casimir effect in those features.