3 ms·
As you point out, the spec includes threshold values for errors, and the actual epsilon error values vary between vendors as well as within the CPUs from the sa
by tagrun 7y ago
As you point out, the spec includes threshold values for errors, and the actual epsilon error values vary between vendors as well as within the CPUs from the same vendor.
He's wrong, because 1) this discussion is his false claim that Intel is justified in disabling AMD's AVX/AVX2 implementation because it fails to meet the spec 2) his plot doesn't show any variance between AMD vs Intel.
- creato 7y agoMy claim is not that AMD doesn't meet the spec, as I've repeatedly stated in this thread. The claim is that it's different, and so you can't assume testing on one processor is sufficient to guarantee the results on another. And again, that this particular instruction is just one of many examples where intel and AMD will differ in their results. The point of my plot was to show that the behavior of instructions like this is super weird and random, it's not something that we should expect to be consistent across vendors. It's probably not consistent across all of intel's CPUs either, but they're probably aware of and test for all of these.