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All modern x86 CPUs are essentially “RISC” CPUs that translate x86 instructions into uOPS so they already do what you want to do. I’m not seeing why the higher
by dogma1138 7y ago
All modern x86 CPUs are essentially “RISC” CPUs that translate x86 instructions into uOPS so they already do what you want to do.
I’m not seeing why the higher level x86 instruction set needs to be jettisoned or killed off...
- pepemon 7y ago> All modern x86 CPUs are essentially “RISC” CPUs Where can I read more about that?
- grantisu 7y agoIf you can work around the formatting issues, there's some classic articles on Ars Technica, e.g. http://archive.arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html http://archive.arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
- pjscott 7y agoAnd ARM processors these days tend to do the same, translating from the Thumb-2 variable-width instruction encoding into whatever each processor uses internally.
- floatboth 7y agoThumb-2 is for microcontrollers (and not all of them even). Anything unix-capable (Cortex-A series and custom cores) reads fixed width AArch64 instructions.