Actually, at any given time, a large number of the "hardware" operations being passed to a modern CPU are actually being "interpreted" using the microcode imple

Actually, at any given time, a large number of the "hardware" operations being passed to a modern CPU are actually being "interpreted" using the microcode implemented on the CPU itself. Even in the case of instructions which do map directly to hardware ops, the CPU is still doing branch prediction and prefetching, which implies that the code is being examined (i.e., "interpreted") before being executed. I'm not trying to say that performance isn't better when funneling native instructions down to the CPU; rather, just that it's worth remembering that there's really no such thing as "[running] on bare metal" any more, at least on a modern x86 ISA system.