On the bright side, the core CMSIS headers should work with all ARM Cortex-M cores, so you don't get locked into one vendor's HAL to do things like setup interr

On the bright side, the core CMSIS headers should work with all ARM Cortex-M cores, so you don't get locked into one vendor's HAL to do things like setup interrupts or interact with registers that are common to ARM cores. It also has something approaching first-party support with a permissive license. I think that the ALLCAPS parts come from acronyms in most cases. Like, NVIC = Nested Vector Interrupt Controller. The naming can get a little bit confusing, but it seems fairly consistent.