2 ms·
It's probably the only part where hardware development (FPGA or ASIC) has a significant edge: "time travel debugging" is the norm, where you have a wave window
by ipoopatwork 7y ago
It's probably the only part where hardware development (FPGA or ASIC) has a significant edge: "time travel debugging" is the norm, where you have a wave window with your design state cycle by cycle. Can't wait to see more of that in software!