4 ms·
I more or less compulsively downloaded this, and started skimming it. I'm not an assembly-language programmer, but I thought I at least knew how to read an asse
by reidacdc 7y ago
I more or less compulsively downloaded this, and started skimming it. I'm not an assembly-language programmer, but I thought I at least knew how to read an assembly listing.
But right there on page 8, in the MIPS and ARM "functions that return a constant", is an example of "branch delay slots", which (a) I've never heard of, and (b) failure to grok them makes a two line function incomprehensible.
Fortunately, I like learning things.
- sabas123 7y agoISA's can get very complex very fast, so I would suggest, like the author wrote down in next sentence, to realize that some complexity is best left for a later time. Now that I think about it, ISA's/assembly are a really good example of how lots of tiny small things combined can become really hard to understand fast.
- saagarjha 7y agoMIPS’s choice to shove details from the instruction decoding pipeline into its visible execution model is still kinda annoying though…
- pests 7y agoBranch delay slots on MIPS come about because the instruction decoder already has the next instruction ready by the time the conditional runs. The architecture decides to unconditionally run this instruction instead of potentially throwing it away due to the results of the branch.
- nickysielicki 7y agoBranch delay slot gives you something to do while you're not sure where you're going. In the best case, you don't take the branch, and you have made progress down the correct path without knowing that it was the correct path. However, it's not always possible to fill the branch delay slot with useful instructions, so a lot of the time it ends up just being a nop.