4 ms·
No. See caveat #4. The code stems for the same-machine IPC library. No point in doing any byte order normalization. Trivial to add though if needed.
by apankrat 7y ago
No. See caveat #4.
The code stems for the same-machine IPC library. No point in doing any byte order normalization. Trivial to add though if needed.
- chrisseaton 7y ago> The code stems for the same-machine IPC library. No point in doing any byte order normalization. Some processors can run one process in one byte order, and another process in another byte order! For example Itanium and the UM.be bit which the user can set.
- apankrat 7y agoNice, didn't know that. Seems a bit unfair though they didn't cover middle-endian order. Seriously though, how many machines are configured like that in the real world and what's the overlap with our target installation base?
- chrisseaton 7y agoNo idea - but it's something to keep in mind if you have the assumption in your head that 'byte order is constant for a machine'.
- apankrat 7y agoIt almost universally is though, no? I'd expect a processor core with inverted endianness to be excluded from the general use and reserved for select processes that require that feature.
- chrisseaton 7y agoI don’t think so - it’s just another processor flag and processes can switch it as needed. For example you could switch while reading data from a network connection and back again afterward.
- apankrat 7y agoIt'd be interesting to see any real-world uses of this. Must be something rather exotic that could benefit from not doing bswap/s in bulk.
- tlb 7y agoI used to be careful to use Network Byte Order (defined in some RFC as big-endian) for everything. But for the last several years I use native byte order, and I haven't been sorry yet. It's significantly faster and simpler for x86, and big-endian systems are very rare these days.
- brandmeyer 7y agoARM is also ambi-endian. Its rare to encounter big-endian ARM in the wild, but it does happen. TI's RM57 and TMS570 look an awful lot like they have the exact same silicon in them, except that one of them is wired for ARMEB and the other is wired for ARMEL. its likely configured for one or the other by burning a wee bit of OTP at the factory.