There's a lot of detail in a really in-depth (but very interesting) AnandTech article about Intel's 10nm process [0]. The basic idea is Intel have multiple dist

There's a lot of detail in a really in-depth (but very interesting) AnandTech article about Intel's 10nm process [0]. The basic idea is Intel have multiple distinct sets of logical unit designs at different densities which have different characteristics. It's like having multiple software libraries that do the same thing but have different performance etc. except it's a library of silicon building blocks. You trade-off speed with density (highest performance library uses the least dense circuits). Each chip's design can be made up of bits of silicon from these different libraries. Different densities also have different power consumption, so in cases it makes sense to build low power chips that have small high performance, power sucking parts that can be used sparingly. [0]: https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-and-core-i3-8121u-deep-dive-review/3 https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-...