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According to Sophie Wilson, one of the reasons Acorn decided to go ahead with their own CPU design was the fact that in 1983 the 68000 and other contemporary CP
by djmips 7y ago
According to Sophie Wilson, one of the reasons Acorn decided to go ahead with their own CPU design was the fact that in 1983 the 68000 and other contemporary CPUs were bottle-necked on memory access.
- cmrdporcupine 7y agoOf course within a few years _everything_ was bottle necked on memory access and the advantages of processors that could do memory access in few cycles (like the 6502 or early ARM) doesn't mean much anymore, as CPU speeds easily outstripped memory speeds.
- aidenn0 7y agoWider memory buses were still less bottlenecked than narrower though. See the transition from 32 to 64 to 128 to 256. POWER9 has an absurd setup which is 192 bits wide at the CPU (2 controllers each with 4 24 bit DMI interfaces), but each DMI has a 256 bit path t memory. https://en.wikichip.org/wiki/ibm/microarchitectures/power9 https://en.wikichip.org/wiki/ibm/microarchitectures/power9
- snvzz 7y ago68000 and 68010 had no icache or dcache. 68010 had a 1 instruction loop cache, which accelerated tight loops considerably, as it wouldn't need to fetch the instruction. Think e.g. a move with a builtin decrement then a branch if not zero.