2 ms·
PCIe generations are the ONE thing AMD cannot easily rollback or advance out of cycle, since it’s used as the interconnect between everything on the die.
by snuxoll 7y ago
PCIe generations are the ONE thing AMD cannot easily rollback or advance out of cycle, since it’s used as the interconnect between everything on the die.
- sliken 7y agoReally? The Infinity Fabric (current generation that evolved from hypertransport) is a cache coherent serial network that can also do PCI-e (non-cache coherently). This can be swapped on a per serial connection basis as needed. Seems like they could rev the PCI-e side without changing the IF side. The I/O chip has separate connections for off chip, so they could use PCI-5 there and not change the connections to any of the CPU chipets. At least it seems that way... corrections?
- wtallis 7y agoThe PCIe and IF connections are basically two MACs sharing the same PHY, and the PHY is the hard part to speed up. There's not really a plausible way that AMD could end up in a situation where they would have reason to boost the speed of just one out PCIe or off-package IF. And the on-package IF PHY between the IO die and the CPU chiplets is easier to get working at a given speed than the off-package version (though I don't remember off the top of my head if they are still using two separate PHY designs on the current generation). So by the time they've got an upgraded IO die with PCIE 5/6/etc., it's pretty much guaranteed that they will be ready to bump up the IF link speed to match.