7 ms·
From the great article: "x86_64 is the 64-bit extension of a 32-bit extension of a 40-year-old 16-bit ISA designed to be source-compatible with a 50-year-old 8
by stragies 7y ago
From the great article:
"x86_64 is the 64-bit extension of a 32-bit extension of a 40-year-old 16-bit ISA designed to be source-compatible with a 50-year-old 8-bit ISA. In short, it’s a mess, with each generation adding and removing functionality, ..."
Nice way of wording that! :)
It also explains the complexity of the following 10 pages of text.
- kjs3 7y agoLinus disagrees: https://yarchive.net/comp/linux/x86.html https://yarchive.net/comp/linux/x86.html
- tyoma 7y agoEvery time Intel has tried to more away from x86 (i960? Itanium? Maybe others...) they end up coming back. The years of backwards compatibility are a big selling point.
- wvenable 7y agoThere is value in the fact that the instruction set is an abstraction. CPU's built with more low-level instruction sets became obsolete faster because they couldn't adapt to new features and maintain compatibility as easily.
- setpatchaddress 7y agoSounds like survivorship bias. x86's longevity is due to the amount of money thrown at the problem. You could surely start with a much cleaner instruction set like the M68k and wind up with a same-or-better result after spending billions on multiple projects to invent new ways of ameliorating the complexity of the ISA, some in parallel, over time. Or you can start by eliminating most of the decode complexity and not spend those billions, like ARM.
- jcranmer 7y agoThe decoder doesn't actually take all that much space in the hardware, though. It's going to be smaller than the normal OoO logic, which means it's a pretty minor tax at best for actual hardware.
- baybal2 7y agoSaw die shots of Atom? Decoder makes more than half of the core, and there is no instruction cache. In a loop, you will be spending more joules on decoding than actual computations.
- darkmighty 7y agoInstruction complexities can be used to save bandwidth/delay (and related energy consumption) at the cost of decoder size. Communication limitations are increasingly dominant in processors afaik; so the analysis is not so simple as to decoder size either.
- jabl 7y agoCompressed RISC ISA's (e.g. RISC-V C extension) achieve density comparable to x86, with a much simpler decoder.
- adwn 7y ago> It's going to be smaller than the normal OoO logic, which means it's a pretty minor tax at best for actual hardware. But it's a major tax for designing that hardware, and a potential source of bugs (the more complex, the more difficult to debug and verify).
- cogman10 7y agoI really wish Itanium had taken off. IMO it is a superior architecture that was simply ahead of it's time. Wouldn't it be great if software instead of hardware, had complete control of instruction ordering? Wouldn't it be great to not be limited by the current SIMD restrictions? Wouldn't it be nice if you could choose to spend more compile time to get even faster programs (vs relying on the hardware to do it JIT)? I mean, I get why it didn't happen. Stupid history chose wrong (Like making electrons have a negative charge).
- wolfgke 7y ago> I really wish Itanium had taken off. IMO it is a superior architecture that was simply ahead of it's time. Itanium was an architecture that was designed for "big iron", i.e. fast, powerful computers. It is thus, in my opinion, much harder to "scale down" to, say, mobile devices than x86.
- unlinked_dll 7y agox86 hasn't really proven that it scales down well for mobile devices either.
- toast0 7y agoThere are some x86 Android phones, and Windows 10 Mobile's Continuum looked designed to be run on an x86 phone, but Intel killed that line of processors before Microsoft built a device.
- wolfgke 7y agoIntel produced SoCs for mobile devices, concretely Speatrum SC9853i and Spreadtrum SC9861G-IA. If you want to scale even further down, consider Intel Quark (https://en.wikipedia.org/wiki/Intel_Quark https://en.wikipedia.org/wiki/Intel_Quark). For an analysis why it failed in the market, consider http://linuxgizmos.com/who-killed-the-quark/ http://linuxgizmos.com/who-killed-the-quark/ To me, it seems that the central reason why these chips failed commercially is that at the lower end, SoCs offer a much thinner margins than CPUs for laptops, desktop PCs and servers.
- NPC32419419 7y agoIntel did not create x86_64. AMD did.
- teddyh 7y agoSee also this old Microsoft Windows 95-era joke: “32 bit extensions and a graphical shell for a 16 bit patch to an 8 bit operating system originally coded for a 4 bit microprocessor, written by a 2 bit company, that can't stand 1 bit of competition.”
- wolfgke 7y ago> “32 bit extensions and a graphical shell for a 16 bit patch to an 8 bit operating system originally coded for a 4 bit microprocessor, written by a 2 bit company, that can't stand 1 bit of competition.” DOS was a 16 bit operating system. The 8088 (the processor of the IBM-PC) was an 16 bit (if you consider the instruction set) or 8 bit (if you consider the width of the data bus) processor.
- jstanley 7y agoCP/M was an 8-bit operating system.
- Taniwha 7y agoto be fair the 8088 was essentially the same die as an 8086 with an 8-bit bus .... memory was expensive back then
- kjs3 7y agoThe OP referenced is what is called a 'joke'. Oddly, 'jokes' are not always intended to be pedantically accurate.
- withzombies 7y agoARM64 (aka AArch64) is the best version of x86 yet. It's clean, very little warts, they learned from their mistakes with ARMv7/Thumb2 (specifically the IT instruction). It helps that Apple controls the whole ecosystem and could seamlessly move to ARM64. The Android transition has been making progress also. Maybe someday we'll drop 32bit and 16bit support in x86 systems (and also in "modern" programming languages!).
- shakna 7y ago> ARM64 (aka AArch64) is the best version of x86 yet. Huh? Isn't that ARM and not even remotely compatible with x86?
- withzombies 7y agoARM64 is what Intel would design if they learned from the lessons of x86 and got a chance to restart.
- solarexplorer 7y agoWell, actually they did try a few times. Itanic and the Intel iAPX 432 come to mind...
- unlinked_dll 7y agohttps://en.wikipedia.org/wiki/IA-64 https://en.wikipedia.org/wiki/IA-64
- monocasa 7y agoI'm sure that's not true. I've heard a great rant from an Intel CPU engineer about how CISC is a great fit for large OoO cores. Like how memory RMW instructions can be thought of as allocating physical register file resources with no architectural register file requirements, no extra instruction stream bits required, and no confusions inside the core about register data dependencies of the instruction. It'd be fun to throw together a modern CISC-V or something that does a better job than x86 from an instruction encoding efficiency perspective, and see how it stacks up against modern RISCs.
- SilasX 7y agoEvery mobile app: "Sorry your version is incompatible with the service as it existed three months ago, you have to update."