Very cool, thank you! While you can iterate pretty quickly on an FPGA, I'd still be worried that cutting down a chip to optimize for $/perf works until it does

Very cool, thank you! While you can iterate pretty quickly on an FPGA, I'd still be worried that cutting down a chip to optimize for $/perf works until it doesn't. Something off the shelf would be pretty resilient to algorithm tweaks (ad absurdum you have an Intel chip which performs black magic to run almost anything you throw at it well). It's pretty hard to overcome the economy of scale of just buying a mass produced chip that's twice what you need but ten times cheaper because they're made in batches of a million. I should note that my skepticism is coming from a place of "I want this to be a thing". Using the web page to design a chip is an instance of "live in the future and build what's missing" if I've ever seen one.