So, is the U8 core based on BOOM, or is it a ground up design? Or if neither, then what is it? And the HBM2E+ is some doohickey so customers can combine a RISC

So, is the U8 core based on BOOM, or is it a ground up design? Or if neither, then what is it? And the HBM2E+ is some doohickey so customers can combine a RISC-V core with HBM2 memory? (and if somebody from SiFive happens to read this, there's a typo, presumably HMB2E+ means HBM2E+)