4 ms·
It's not really similar to hyper-threading. You still just had one thread of execution, you just didn't have the overhead of pushing CPU state to working memory
by avian 7y ago
It's not really similar to hyper-threading. You still just had one thread of execution, you just didn't have the overhead of pushing CPU state to working memory (RAM) on context switch. Hence the CPU could switch contexts on every instruction instead of much more rarely like modern multitasking OSes tend to do.
Reading this I was reminded of the shadow register set on Z80. This CPU has two "special register groups" that could be switched by a single 4-cycle opcode. As far as I remember, the original idea was to have "main" and "interrupt" CPU contexts without the overhead of pushing/poping the stack (which could cost tens of cycles). From what I've seen however, people were mostly ignoring that feature in practice, or using it for various nasty hacks when they ran out of CPU registers.
- monocasa 7y agoNah, this is for sure a form symmetric multithreading (or hyper-threading, Intel's trademark on the technique). Unlike the Z80's shadow register set and like hyper-threading this scheme keeps an independent program counter around for each of the register groups. Doing a thread switch each cycle is pretty common in simpler SMT designs like the UltraSPARC T series, the PPE on the Cell, and the shader cores on PowerVR GPUs.