4 ms·
I don't think that's the case here - see my other longer comment, but I think ETW uses the PEBS sampling events, so the instruction is usually the slow-to-retir
by BeeOnRope 7y ago
I don't think that's the case here - see my other longer comment, but I think ETW uses the PEBS sampling events, so the instruction is usually the slow-to-retire one, not the subsequent one.
I believe cmp/jne macro fuse on this CPU, so you actually will never get any samples on the first of the two fused instructions: rather they all show on the second one. You see this same effect on Linux when sampling with the cycles:ppp event.
- Const-me 7y ago> macro fuse on this CPU, so you actually will never get any samples on the first of the two fused instructions Haven’t thought about µ-ops fusion in this case. Yes, that explanation is very plausible.
- brucedawson 7y agoI have seen no signs of samples hitting the most expensive instruction in ETW trace. Across other cases I have looked at the samples tend to cluster after expensive instructions, not on them. I guess it's possible that all of the cases I looked at were distorted by macro fusion but I don't think so.
- BeeOnRope 7y agoInteresting, so I guess ETW is using "normal" interrupts which have skid, and the CPU just having enough retire bandwidth to retire everything in one cycle.