3 ms·
Small corrections: > I’m focusing on chips designed for training TPU 1 is designed for inference AFAIK. > TPU v2: 45 TFLOPs I think it would be great to cla
by lopuhin 7y ago
Small corrections:
> I’m focusing on chips designed for training
TPU 1 is designed for inference AFAIK.
> TPU v2: 45 TFLOPs
I think it would be great to clarify that what is commonly referred to as "TPU v2" (e.g. on GCP pricing, also what is shown in the image in this article), consists of 4 such modules with 8 cores total, which gives a more commonly quoted value of 180 TFLOPs.
- jwhanlon 7y agoThanks. I've updated the article with clarifications and correct TPU numbering. The text already mentions TPU v1 is inference only, and I think it's useful to include as context.