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I think the embedded wafer level or "panel" level packaging technologies are the mid-ground. These technologies don't use expensive silicon, and instead surroun

I think the embedded wafer level or "panel" level packaging technologies are the mid-ground. These technologies don't use expensive silicon, and instead surround the die with cheaper epoxy. Then the interconnects are built on top of that, and can connect multiple die together. Yield and interconnect pitch are the big issues here though, and that's why I think you're right, that we will see SoCs or mobile systems first, not whole motherboards. With that said, some of these technologies can have a layer of surface mount pads on top. So you have a substrate of epoxy with all your chips and interconnects embedded in it, and then surface mount parts on top. For example, passives, connectors, etc. It would look almost like a motherboard, but with all the chips inside. Of course, for cost and yield reasons, this will be for mobile devices only at first.

jacobush 7y ago
Say what now? The die is the silicon, right?
- craigjb 7y ago
  I didn’t phrase that well. I meant that the wafer wafer and panel level embedded technologies embedded the silicon die inside of cheaper epoxy, instead of building expensive silicon interconnect to integrate them on. They basically make a plastic wafer with a bunch of die in it. Then interconnect is built up on that. Edit: the links below show solder balls. Today this technology is used for packaging, and has been used on chips in phones for years now. In the near future, we should be able to embed or surface mount passives and mechanical components, so maybe we don’t need the PCB. https://www.semanticscholar.org/paper/3D-eWLB-%28embedded-wafer-level-BGA%29-technology-for-Yoon-Bahr/a1d40073225787af262b0d2f3755ecacee90df6e/figure/8 https://www.semanticscholar.org/paper/3D-eWLB-%28embedded-wa... https://www.semanticscholar.org/paper/Latest-material-technologies-for-Fan-Out-Wafer-Watanabe-Kouda/0420b663a5627a32e841fb8c8c38879e65b82363/figure/0 https://www.semanticscholar.org/paper/Latest-material-techno...

jacobush 7y ago

Say what now? The die is the silicon, right?

craigjb 7y ago
I didn’t phrase that well. I meant that the wafer wafer and panel level embedded technologies embedded the silicon die inside of cheaper epoxy, instead of building expensive silicon interconnect to integrate them on. They basically make a plastic wafer with a bunch of die in it. Then interconnect is built up on that. Edit: the links below show solder balls. Today this technology is used for packaging, and has been used on chips in phones for years now. In the near future, we should be able to embed or surface mount passives and mechanical components, so maybe we don’t need the PCB. https://www.semanticscholar.org/paper/3D-eWLB-%28embedded-wafer-level-BGA%29-technology-for-Yoon-Bahr/a1d40073225787af262b0d2f3755ecacee90df6e/figure/8 https://www.semanticscholar.org/paper/3D-eWLB-%28embedded-wa... https://www.semanticscholar.org/paper/Latest-material-technologies-for-Fan-Out-Wafer-Watanabe-Kouda/0420b663a5627a32e841fb8c8c38879e65b82363/figure/0 https://www.semanticscholar.org/paper/Latest-material-techno...