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It's been fun to see Dr. Subu present this concept and prototypes at several conferences, and the level of integration possible is absolutely insane. I think th

It's been fun to see Dr. Subu present this concept and prototypes at several conferences, and the level of integration possible is absolutely insane. I think the industry is definitely moving toward chiplets, such as the latest AMD release. I definitely think we will see more chiplets and more standardization on interfaces between chiplets. The focus will be on how to minimize energy per bit transferred (a big topic in Subu's talks) and how to minimize the die area used for inter-chiplet communication. In monolithic silicon, you don't have to think about die area, since your parallel wires between sections might just need a register or two along the way. With chiplets, you typically can't run wires at that density yet, so you still have some serialization/deserialization hardware. But, since it's not crossing multiple high inductance solder balls and PCB traces, you can get away with less. Hopefully also you can get away without area-intensive resynchronization, PLLS, etc. I think it will definitely be awhile before this kind of integration is used outside of niche cases though. The costs are just insane. You have to pre-test all manufactured chiplets before integration, and that test engineering is nothing to sneeze at. If you don't then you have all kinds of commercials issues about who is liable for the $500k prototype one bad chip broke. On the bright side, I see the chiplet approach benefitting other integration technologies. For example, wafer level and panel level embedded packaging technologies can be used for 1-2um interconnects now. You won't get a wafer sized system out of it with any kind of yield, but it's probably the direction mobile chips and wearables will go. Anyway, disorganized info-dump over.

jabl 7y ago
I agree this looks promising, though I'm not an expert in this field. But the title is a bit, well, overpromising or broad. I don't think we'll replace traditional motherboards anytime soon (except maybe in smartphones?). Rather, it will be an incremental progress. - first, SoC's will be replaced with chiplets - then we'll start seeing more and more stuff being integrated on this wafer. - say, instead of a server motherboard with multiple sockets, have all the CPU chiplets on the same wafer and enjoy much better bandwidth than you get with a PCB - integrate DRAM on the wafer. This will be painful as we're used to being able to simply add DIMM's, but the upside is massively higher bandwidth. The motherboard pcb per se will live for a long time still, if nothing else then as the place to mount all the external connectors (network, display, pcie, usb, power, whatnot).
- mjevans 7y ago
  NUMA will be much more important. This will really push on memory hierarchy aware data structures and programs.
  - jabl 7y ago
    Hmm, I would say the opposite. If all the memory and CPU cores are integrated on a single wafer, the penalty for off-chip access would be much less than if you had to go through a PCB.
    - mjevans 7y ago
      It'll be less than a networked cluster, but it still mattered with Threadripper units and I'd expect a racked board of this nature to expose more disparity between accessing memory in other chiplet areas.
- craigjb 7y ago
  I think the embedded wafer level or "panel" level packaging technologies are the mid-ground. These technologies don't use expensive silicon, and instead surround the die with cheaper epoxy. Then the interconnects are built on top of that, and can connect multiple die together. Yield and interconnect pitch are the big issues here though, and that's why I think you're right, that we will see SoCs or mobile systems first, not whole motherboards. With that said, some of these technologies can have a layer of surface mount pads on top. So you have a substrate of epoxy with all your chips and interconnects embedded in it, and then surface mount parts on top. For example, passives, connectors, etc. It would look almost like a motherboard, but with all the chips inside. Of course, for cost and yield reasons, this will be for mobile devices only at first.
  - jacobush 7y ago
    Say what now? The die is the silicon, right?
    - 7y ago
test6554 7y ago
He said he prefers dielets over chiplets, but we’ll see what sticks.
Quequau 7y ago
Are you perhaps aware if videos of these presentations are available anywhere online?
whatitdobooboo 7y ago
What niche cases do you think this applies to first? They will probably be the ones to propel this technology forward if I had to guess
pizzazzaro 7y ago
Im intensely curious about how well a press-fit, hand-swappable setup could work in these Si-IF chiplet systems. Add in standardized, but distinct pin-layouts per chiplet? And only the bad chiplet is wasted in the manufacturing process. Going greener will mean cutting this kind of waste - throwing the whole motherboard out for one bad chip. Right to Repair laws could finally exist meaningfully for computers. As for the 33mm to 300mm silicon wafer jump - why cant we just make 20-30mm "quilts" of this "fabric"? Sure, it makes for some wild "puzzle piece" designs. But why not embrace that, allowing for distinct-edges to demark such? Heck, why throw out the whole silicon board when one puzzle-piece / Si-IF "patch" of the quilt goes bad over time, if the design is still used? Looking at how you dont necessarily want to connect one chiplet bridging different "patches" of this fabric (or rather, when do you? SLI graphics bridges being what they are), the edges make a nice designated place to put smaller heatsyncs.
pizzazzaro 7y ago
But lets be honest here - isnt there a massachusetts solar panel company with a patent on precision slicing large blocks of silicon? They seem like they might be the experts we need on making larger pieces of silicon.

jabl 7y ago

I agree this looks promising, though I'm not an expert in this field. But the title is a bit, well, overpromising or broad. I don't think we'll replace traditional motherboards anytime soon (except maybe in smartphones?). Rather, it will be an incremental progress. - first, SoC's will be replaced with chiplets - then we'll start seeing more and more stuff being integrated on this wafer. - say, instead of a server motherboard with multiple sockets, have all the CPU chiplets on the same wafer and enjoy much better bandwidth than you get with a PCB - integrate DRAM on the wafer. This will be painful as we're used to being able to simply add DIMM's, but the upside is massively higher bandwidth. The motherboard pcb per se will live for a long time still, if nothing else then as the place to mount all the external connectors (network, display, pcie, usb, power, whatnot).

mjevans 7y ago
NUMA will be much more important. This will really push on memory hierarchy aware data structures and programs.
- jabl 7y ago
  Hmm, I would say the opposite. If all the memory and CPU cores are integrated on a single wafer, the penalty for off-chip access would be much less than if you had to go through a PCB.
  - mjevans 7y ago
    It'll be less than a networked cluster, but it still mattered with Threadripper units and I'd expect a racked board of this nature to expose more disparity between accessing memory in other chiplet areas.
craigjb 7y ago
I think the embedded wafer level or "panel" level packaging technologies are the mid-ground. These technologies don't use expensive silicon, and instead surround the die with cheaper epoxy. Then the interconnects are built on top of that, and can connect multiple die together. Yield and interconnect pitch are the big issues here though, and that's why I think you're right, that we will see SoCs or mobile systems first, not whole motherboards. With that said, some of these technologies can have a layer of surface mount pads on top. So you have a substrate of epoxy with all your chips and interconnects embedded in it, and then surface mount parts on top. For example, passives, connectors, etc. It would look almost like a motherboard, but with all the chips inside. Of course, for cost and yield reasons, this will be for mobile devices only at first.
- jacobush 7y ago
  Say what now? The die is the silicon, right?
  - 7y ago

test6554 7y ago

He said he prefers dielets over chiplets, but we’ll see what sticks.

Quequau 7y ago

Are you perhaps aware if videos of these presentations are available anywhere online?

whatitdobooboo 7y ago

What niche cases do you think this applies to first? They will probably be the ones to propel this technology forward if I had to guess

pizzazzaro 7y ago

Im intensely curious about how well a press-fit, hand-swappable setup could work in these Si-IF chiplet systems. Add in standardized, but distinct pin-layouts per chiplet? And only the bad chiplet is wasted in the manufacturing process. Going greener will mean cutting this kind of waste - throwing the whole motherboard out for one bad chip. Right to Repair laws could finally exist meaningfully for computers. As for the 33mm to 300mm silicon wafer jump - why cant we just make 20-30mm "quilts" of this "fabric"? Sure, it makes for some wild "puzzle piece" designs. But why not embrace that, allowing for distinct-edges to demark such? Heck, why throw out the whole silicon board when one puzzle-piece / Si-IF "patch" of the quilt goes bad over time, if the design is still used? Looking at how you dont necessarily want to connect one chiplet bridging different "patches" of this fabric (or rather, when do you? SLI graphics bridges being what they are), the edges make a nice designated place to put smaller heatsyncs.

pizzazzaro 7y ago

But lets be honest here - isnt there a massachusetts solar panel company with a patent on precision slicing large blocks of silicon? They seem like they might be the experts we need on making larger pieces of silicon.