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Xilinx gives away access to a multi-language license for Vivado, fully capable for all chips under hundreds of dollars, with a built in simulator (again, mixed

Xilinx gives away access to a multi-language license for Vivado, fully capable for all chips under hundreds of dollars, with a built in simulator (again, mixed language!) used by tens of thousands of actual hardware engineers around the world successfully, but they're the bad guys? And their "unsupported" tool is also used successfully today by rafts of actual hardware engineers, and it's still better than the free alternatives by leaps and bounds. There are no plucky garage shops or "wise crowds" making FPGA tools that are even in the same galaxy as ISE or Vivado.

ZirconiumX 7y ago
> There are no plucky garage shops or "wise crowds" making FPGA tools that are even in the same galaxy as ISE or Vivado. Symbiotic EDA comes to mind. However, I would argue they don't need to be great, just good. I don't have a copy of Vivado to hand (I have an Altera dev board instead), but I can take PicoSoC with Yosys/nextpnr and have a bitstream in about a minute. If I try the same task in Quartus, that takes about five minutes. Producing a (relatively) inefficient bitstream actually speeds up the compile/run cycle in that scenario. If the design meets timing, which is often decided by external factors, any extra time spend trying to make the design "better" is wasted time.