5 ms·

For those missing the context, this was a circa 1985 attempt to execute Forth almost directly in hardware. Very cool, and a bit weird by 1985 standards

ktpsns 7y ago
How does this architecture perform in terms of FLOPs per Watt, compared with traditional register based architectures?
- lebuffon 7y ago
  It doesn't have a floating point processor so it would not do FLOPS very efficiently compared to modern machines. In that era the power to performance ratio was not as critical since the clock speed of this device was typically sub 12MHz. (yes that is 12,000,000 Hz) Power losses are quite a bit less than at 1.2GHz
- opencl 7y ago
  FLOPs is probably not a very sensible measure for measuring hardware from 1985, nothing had FPUs back then. Novix claimed that it achieved 10 MIPS at 7.5Mhz drawing about 0.35W. Kind of hard to verify how accurate their claims were with the chips being impossible to find though. Also from 1985, a 20Mhz MC68HC000 drew 0.38W[2] for 3.5 MIPS (going by 0.175 MIPS/Mhz[3]). So if you believe Novix's claims it had really good power efficiency for the time. [1] https://en.wikichip.org/w/images/a/a6/nc4016.pdf https://en.wikichip.org/w/images/a/a6/nc4016.pdf [2] https://en.wikipedia.org/wiki/Motorola_68000 https://en.wikipedia.org/wiki/Motorola_68000 [3] https://en.wikipedia.org/wiki/Instructions_per_second https://en.wikipedia.org/wiki/Instructions_per_second
  - abecedarius 7y ago
    As I remember it they claimed much faster interrupt handling too -- I don't remember the details. Something like only having to save a couple of hardware registers.
    - mud_dauber 7y ago
      Exactly. Task switching was (if memory serves - no pun intended) no more than 3-4 references.
  - kjs3 7y ago
    FLOPs is probably not a very sensible measure for measuring hardware from 1985, nothing had FPUs back then. Umm...the Intel 8087 was '80 or '81, and it was AFAIK the most popular PC upgrade after memory. The 68881 was '84. My NS32081s have '84 datecodes but came out earlier. The Am9511/C8231 were mid to late 70s and all over the 8-bitters. Weitek had 3rd party solutions for 68k, x86 and lots of others in this timeframe, and MMI was pitching the 74S516 for the 68k early 80s. Almost everything had an FPU option in 1985.
denton-scratch 7y ago
I think the only hardware implementation was on a FPGA. I don't see why the Novix architecture could not be re-implemented using modern chips; e.g. 64-bit, 2GHz, onboard cache, etc.
- abecedarius 7y ago
  A gate array iirc, but definitely not FPGA: I remember reading in the manual that there was a bug in one of the instructions (the multiply-step, I think?). With an FPGA they'd surely have just fixed it instead of shipping a batch of buggy chips.
DonHopkins 7y ago
Forth is a bit weird by 1985 (or any year's) standards, so a chip designed to execute it directly will be a bit weird too! For example, Forth uses separate operand (data/parameter) and return stacks, instead of interleaving them in main memory like most CPUs and runtimes. So the Novix has separate memory and busses to the return stack, operand stack, and main memory, and it can independently push or pop from them in parallel, in the same (bit-sliced) instruction! And that's frequently useful: >The NC4016 subroutine return bit allows combining a subroutine return with other instructions in a similar manner. This results in most subroutine exit instructions executing "for free" in combination with other instructions. An optimization that is performed by NC4016 compilers is tail-end recursion elimination. Tail-end recursion elimination involves replacing a subroutine call/subroutine exit instruction pair by an unconditional branch to the subroutine that would have been called. >When the NC4016 was designed, gate array technology did not permit placing the stack memories on-chip. Therefore a minimum NC4016 system consists of three 16-bit memories: one for programs and data, one for the data stack, and one for the return stack.
dbcurtis 7y ago
Stack machines were never very popular outside of Burroughs. Burroughs built several of them implementing a number of elegant ideas. When Algol first came out, they put a grad student summer intern onto the project of writing an Algol compiler, from scratch, for one of the stack machines. The intern completed the entire compiler in one summer. So, the question is, was the compiler a single summer intern project because stack machines are so well suited to Algol, or was the compiler a single summer intern project because the intern was Don Knuth?
- mgsouth 7y ago
  The HP3000 [0] ("classic", pre-PA-RISC) was stack-based. It was a pretty popular business machine; the Classic architecture was produced between early 70s and early 90s. It was 16-bit, segmented, Harvard, and competed against IBM S/32 - S/36, AS400, PDP-11, and Vax. To most programmers there wasn't anything too special about the architecture; almost all development was in RPG, COBOL, or a really incredible (for CRUD) 4GL product from Cognos called Powerhouse [1]. [0] https://en.m.wikipedia.org/wiki/HP_3000 https://en.m.wikipedia.org/wiki/HP_3000 [1] https://en.m.wikipedia.org/wiki/PowerHouse_(programming_language) https://en.m.wikipedia.org/wiki/PowerHouse_(programming_lang...
- kjs3 7y ago
  Actually, there were a number of stack machines that were pretty popular in the early days beyond Burroughs (which still exists). As mentioned, the HP3000's were stack machines and hugely popular. The ICL2600 and early Tandem machines were stack machines. And so was the Transputer, which still exists in various descendants. As to Algol, there's certainly a case that a stack machine is a nice abstraction for targeting an Algol compiler. However, having toyed around with writing an Algol compiler, I think the fact that it's a compact, well thought out language with an rigorously described syntax (BNF) that makes it relatively easy to attack, regardless of target.

ktpsns 7y ago

How does this architecture perform in terms of FLOPs per Watt, compared with traditional register based architectures?

lebuffon 7y ago
It doesn't have a floating point processor so it would not do FLOPS very efficiently compared to modern machines. In that era the power to performance ratio was not as critical since the clock speed of this device was typically sub 12MHz. (yes that is 12,000,000 Hz) Power losses are quite a bit less than at 1.2GHz
opencl 7y ago
FLOPs is probably not a very sensible measure for measuring hardware from 1985, nothing had FPUs back then. Novix claimed that it achieved 10 MIPS at 7.5Mhz drawing about 0.35W. Kind of hard to verify how accurate their claims were with the chips being impossible to find though. Also from 1985, a 20Mhz MC68HC000 drew 0.38W[2] for 3.5 MIPS (going by 0.175 MIPS/Mhz[3]). So if you believe Novix's claims it had really good power efficiency for the time. [1] https://en.wikichip.org/w/images/a/a6/nc4016.pdf https://en.wikichip.org/w/images/a/a6/nc4016.pdf [2] https://en.wikipedia.org/wiki/Motorola_68000 https://en.wikipedia.org/wiki/Motorola_68000 [3] https://en.wikipedia.org/wiki/Instructions_per_second https://en.wikipedia.org/wiki/Instructions_per_second
- abecedarius 7y ago
  As I remember it they claimed much faster interrupt handling too -- I don't remember the details. Something like only having to save a couple of hardware registers.
  - mud_dauber 7y ago
    Exactly. Task switching was (if memory serves - no pun intended) no more than 3-4 references.
- kjs3 7y ago
  FLOPs is probably not a very sensible measure for measuring hardware from 1985, nothing had FPUs back then. Umm...the Intel 8087 was '80 or '81, and it was AFAIK the most popular PC upgrade after memory. The 68881 was '84. My NS32081s have '84 datecodes but came out earlier. The Am9511/C8231 were mid to late 70s and all over the 8-bitters. Weitek had 3rd party solutions for 68k, x86 and lots of others in this timeframe, and MMI was pitching the 74S516 for the 68k early 80s. Almost everything had an FPU option in 1985.

denton-scratch 7y ago

I think the only hardware implementation was on a FPGA. I don't see why the Novix architecture could not be re-implemented using modern chips; e.g. 64-bit, 2GHz, onboard cache, etc.

abecedarius 7y ago
A gate array iirc, but definitely not FPGA: I remember reading in the manual that there was a bug in one of the instructions (the multiply-step, I think?). With an FPGA they'd surely have just fixed it instead of shipping a batch of buggy chips.

DonHopkins 7y ago

Forth is a bit weird by 1985 (or any year's) standards, so a chip designed to execute it directly will be a bit weird too! For example, Forth uses separate operand (data/parameter) and return stacks, instead of interleaving them in main memory like most CPUs and runtimes. So the Novix has separate memory and busses to the return stack, operand stack, and main memory, and it can independently push or pop from them in parallel, in the same (bit-sliced) instruction! And that's frequently useful: >The NC4016 subroutine return bit allows combining a subroutine return with other instructions in a similar manner. This results in most subroutine exit instructions executing "for free" in combination with other instructions. An optimization that is performed by NC4016 compilers is tail-end recursion elimination. Tail-end recursion elimination involves replacing a subroutine call/subroutine exit instruction pair by an unconditional branch to the subroutine that would have been called. >When the NC4016 was designed, gate array technology did not permit placing the stack memories on-chip. Therefore a minimum NC4016 system consists of three 16-bit memories: one for programs and data, one for the data stack, and one for the return stack.

dbcurtis 7y ago

Stack machines were never very popular outside of Burroughs. Burroughs built several of them implementing a number of elegant ideas. When Algol first came out, they put a grad student summer intern onto the project of writing an Algol compiler, from scratch, for one of the stack machines. The intern completed the entire compiler in one summer. So, the question is, was the compiler a single summer intern project because stack machines are so well suited to Algol, or was the compiler a single summer intern project because the intern was Don Knuth?

mgsouth 7y ago
The HP3000 [0] ("classic", pre-PA-RISC) was stack-based. It was a pretty popular business machine; the Classic architecture was produced between early 70s and early 90s. It was 16-bit, segmented, Harvard, and competed against IBM S/32 - S/36, AS400, PDP-11, and Vax. To most programmers there wasn't anything too special about the architecture; almost all development was in RPG, COBOL, or a really incredible (for CRUD) 4GL product from Cognos called Powerhouse [1]. [0] https://en.m.wikipedia.org/wiki/HP_3000 https://en.m.wikipedia.org/wiki/HP_3000 [1] https://en.m.wikipedia.org/wiki/PowerHouse_(programming_language) https://en.m.wikipedia.org/wiki/PowerHouse_(programming_lang...
kjs3 7y ago
Actually, there were a number of stack machines that were pretty popular in the early days beyond Burroughs (which still exists). As mentioned, the HP3000's were stack machines and hugely popular. The ICL2600 and early Tandem machines were stack machines. And so was the Transputer, which still exists in various descendants. As to Algol, there's certainly a case that a stack machine is a nice abstraction for targeting an Algol compiler. However, having toyed around with writing an Algol compiler, I think the fact that it's a compact, well thought out language with an rigorously described syntax (BNF) that makes it relatively easy to attack, regardless of target.