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Power ISA has it too. I'm hard pressed to think of a modern architecture that doesn't have it.
by classichasclass 7y ago
Power ISA has it too. I'm hard pressed to think of a modern architecture that doesn't have it.
- CalChris 7y agoRISC-V delegates pcnt to the “B” Standard Extension for Bit Manipulation, and the status of B version 0.90 is Open, meaning it hasn't been finalized. So realistically, RISC-V doesn't have the pcnt instruction. Versions supporting B will have it but that will be at some point in the future.
- saagarjha 7y agoI don’t think ARM does, but there might be some NEON thing that you can use to do something equivalent.
- vaibhavsagar 7y agoARM NEON includes it as VCNT: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489h/CIHCFDBJ.html http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc....
- saagarjha 7y agoHuh, it looks like that only works on 1-byte values? That’s an interesting choice.
- m0zg 7y agoWorse, it's a fertile ground for "interesting" bugs, because VADDV (which sum-reduces the result) reduces into an 8 bit uint. So if you e.g. accumulate two or more quadword VCNTs into a uint8x16_t and then VADDV it, you could end up with something other than the actual overall bit count (because 2 quadwords can have _256_ bits set). Same with accumulating 8 or more VADDVs, except now individual bytes could wrap around if you don't widen in between.
- cozzyd 7y agoSpeaking of ARM, it has an rbit instruction which for some reason doesn't exist on x86.