> We can't do this for the memory wall however You're changing the effective throughput weather you do it by upping the clockrate or deepening the pipeline. Us

> We can't do this for the memory wall however You're changing the effective throughput weather you do it by upping the clockrate or deepening the pipeline. Using half the data per cycle at twice the clock rate will cause the same memory pressure. > which you can use with like explicit preloading into a tiny cache That will kill it. As soon as you put it on the compiler designers or programmers to do something special to realize performance benefits, you're going to loose to architectures that don't. Sure, compiler writers and programmers will optimize for your architecture... if it's popular and widely used. So you have a chicken and egg problem where you need to get adoption in the first place by running existing workloads faster. > We can build 20 GHz CPUs now with passive cooling, Citation? Like for real, that's cool and I'd like to read about it!